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MAX5421AEUB+T
P1-P3
P4-P6
P7-P9
Switching Time and Layout Concerns
The switching time of the MAX5420/MAX5421 depends
on the capacitive loading at W. For best performance,
reduce parasitic board capacitance by minimizing the
circuit board trace from W to the op amp inverting input,
and choose an op amp with low input capacitance.
Chip Information
TRANSISTOR COUNT: 118
PROCESS: CMOS
MAX5420/MAX5421
Digitally Pr
ogrammable Pr
ecision
V
oltage Divider for PGAs
V
OUT
+5V
MATCH_L
H
V
DD
+5V
MATCH_H
L
V
SS
W
GND
MAX5421
V
IN
MAX4493
H
W
L
GND
+5V
+5V
MAX5420
V
DD
V
SS
V
IN
MAX4237
V
OUT
Figure 3. Programmable-Gain Amplifier with Op Amp Bias-
Current Matching
Figure 4. Programmable-Gain Amplifier
R1A
R2A
R3A
L
H
R3B
R2B
R1B
RA
TIO = 1
RA
TIO = 2
RA
TIO = 4
RA
TIO = 8
W
RA
TIO =
R_B
R_A
1+
( )
Figure 1. Simplified Functional Diagram
R1A
R2A
R3A
L
H
R3B
R2B
R1B
RA
TIO = 1
RA
TIO = 2
RA
TIO = 4
RA
TIO = 8
W
RA
TIO =
R_B
R_A
1+
( )
0.1
µ
F
+5V
V
DD
0.1
µ
F
-5V
V
SS
GND
PULSE
GENERA
TOR
D1
D0
MAX5421
TEKTRONIX P6245
OSCILLOSCOPE FET
PROBE
C
L
< 1pF
1M
Ω
Figure 2. Switching Time Test Circuit
_______________________________________________________________________________________
7
MAX5420/MAX5421
Digitally Pr
ogrammable Pr
ecision
V
oltage Divider for PGAs
8
_______________________________________________________________________________________
8LUMAXD.EPS
PACKAGE OUTLINE, 8L uMAX/uSOP
1
1
21-0036
J
REV.
DOCUMENT CONTROL NO.
APPROVAL
PROPRIETARY INFORMATION
TITLE:
MAX
0.043
0.006
0.014
0.120
0.120
0.198
0.026
0.007
0.037
0.0207 BSC
0.0256 BSC
A2
A1
c
e
b
A
L
FRONT VIEW
SIDE VIEW
E
H
0.6±0.1
0.6±0.1
Ø0.50±0.1
1
TOP VIEW
D
8
A2
0.030
BOTTOM VIEW
1
6°
S
b
L
H
E
D
e
c
0°
0.010
0.116
0.116
0.188
0.016
0.005
8
4X S
INCHES
-
A1
A
MIN
0.002
0.95
0.75
0.5250 BSC
0.25
0.36
2.95
3.05
2.95
3.05
4.78
0.41
0.65 BSC
5.03
0.66
6°
0°
0.13
0.18
MAX
MIN
MILLIMETERS
-
1.10
0.05
0.15
α
α
DIM
Package
Infor
mation
(The package drawing(s) in this data sheet may not reflect the most current specifications. For the latest package outline info
rmation
go to
www.maxim-ic.com/packages
.)
MAX5420/MAX5421
Digitally Pr
ogrammable Pr
ecision
V
oltage Divider for PGAs
10LUMAX.EPS
PACKAGE OUTLINE, 10L uMAX/uSOP
1
1
21-0061
REV.
DOCUMENT CONTROL NO.
APPROVAL
PROPRIETARY INFORMATION
TITLE:
TOP VIEW
FRONT VIEW
1
0.498 REF
0.0196 REF
S
6°
SIDE VIEW
α
BOTTOM VIEW
0°
0°
6°
0.037 REF
0.0078
MAX
0.006
0.043
0.118
0.120
0.199
0.0275
0.118
0.0106
0.120
0.0197 BSC
INCHES
1
10
L1
0.0035
0.007
e
c
b
0.187
0.0157
0.114
H
L
E2
DIM
0.116
0.114
0.116
0.002
D2
E1
A1
D1
MIN
-
A
0.940 REF
0.500 BSC
0.090
0.177
4.75
2.89
0.40
0.200
0.270
5.05
0.70
3.00
MILLIMETERS
0.05
2.89
2.95
2.95
-
MIN
3.00
3.05
0.15
3.05
MAX
1.10
10
0.6±0.1
0.6±0.1
Ø
0.50±0.1
H
4X S
e
D2
D1
b
A2
A
E2
E1
L
L1
c
α
GAGE PLANE
A2
0.030
0.037
0.75
0.95
A1
Package
Infor
mation (continued)
(The package drawing(s) in this data sheet may not reflect the most current specifications. For the latest package outline info
rmation
go to
www.maxim-ic.com/packages
.)
Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are
implied. Maxim reserves the right to change the circuitry and specifications without notice at any time.
Maxim Integrated Products, 120 San Gabriel Drive, Sunnyvale, CA 94086 408-737-7600
_____________________
9
©
2005 Maxim Integrated Products
Printed USA
is a registered trademark of Maxim Integrated Products.
P1-P3
P4-P6
P7-P9
MAX5421AEUB+T
Mfr. #:
Buy MAX5421AEUB+T
Manufacturer:
Maxim Integrated
Description:
Digital Potentiometer ICs Precision Voltage Divider for PGAs
Lifecycle:
New from this manufacturer.
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