STSR2P/STSR2PM
4/12
ELECTRICAL CHARACTERISTICS (V
CC
=5V, CK= 250kHz, V
INHIBIT
=-200mV, T
J
=-40 to 125°C, unless
otherwise specified.)
Note1: t
R
is measured between 10% and 90% of the final voltage; t
F
is measured between 90% and 10% on the initial voltage
Note2: Parameter guaranteed by design
Symbol Parameter Test Conditions Min. Typ. Max. Unit
SUPPLY INPUT AND UNDER VOLTAGE LOCK OUT
V
CCON
Start Threshold 3.8 4 V
V
CCOFF
Turn OFF Threshold After
Start
3.5 3.6 V
V
Z
Zener Voltage CK=0V I
Z
= 2mA 5.5 5.8 6 V
I
CC
Unloaded Supply Current OUT
GATE1,2
= no load 22 30 mA
CK=0V OUT
GATE1,2
= no load 3 5
GATE DRIVER OUTPUTS
V
OL
Output Low Voltage I
OUTGATE1,2
=-200mA 0.10 0.16 V
V
OH
Output High Voltage I
OUTGATE1,2
=200mA 4.70 4.85 V
I
OUT
Output Source Peak
Current
2A
Output Sink Peak Current 3.5
R
OUT
Output Series Source
Resistance
I
OUTGATE1,2
=-200mA 0.75 1.5
Output Series Sink
Resistance
I
OUTGATE1,2
=200mA 0.5 0.8
t
R
OUT
GATE1,2
Rise Time C
LOAD
=5nF (Note 1) 40 ns
t
F
OUT
GATE1,2
Fall Time C
LOAD
=5nF (Note 1) 30 ns
t
P1
Clock Propagation Delay to
Turn ON of OUT
GATE1
No Load 130 ns
t
P2
Clock Propagation Delay to
Turn ON of OUT
GATE2
No Load 50 ns
TURN-OFF ANTICIPATION TIME
t
ANT1
OUT
GATE1
Turn-off
Anticipation Time
No Load 75 ns
t
ANT2
OUT
GATE2
Turn-off
Anticipation Time
V
ANT2
= 0 to 1/3V
CC
; no load 75 ns
V
ANT2
=1/3V
CC
to 2/3V
CC
; no load 150
V
ANT2
=2/3V
CC
to V
CC
; no load 225
I
SETANT2
Leakage Current (Note 2) -0.1 0.1 µA
INHIBIT OUT
GATE2
ENABLE
V
H
Threshold Voltage T
J
= 25°C -30 -25 mV
I
H
Leakage Current (Note 2) V
INHIBIT
= 200mV -400 nA
V
INHIBIT
= -200mV 1 µA
t
ON(GATE2)
OUT
GATE1
Turn-off
Anticipation Time
V
INHIBIT
= 200mVNo Load 250 ns
V
CK
Reference Voltage T
J
= 25°C 2.6 2.8 V
I
CK
LX Leakage Current 600 µA
D
OFF
Duty Cycle Shut Down T
J
= 25°C for STSR2P 13 14 %
Duty Cycle Turn ON after
Shut Down
T
J
= 25°C for STSR2P 18 20
t
PW
Minimum Pulse Width STSR2PM 200 ns
STSR2P/STSR2PM
5/12
TIMING DIAGRAM
APPLICATION INFORMATION: STSR2 IN FORWARD CONVERTER SECONDARY SIDE
NOTES
1) Ceramic Capacitors C1 and C2 must be placed very close to the IC;
2)R1andR2settheanticipationtimebypartitioningtheV
CC
voltage;
3) R3 and R4 is a resistor divider meant to provide the correct CK voltage range;
4) R5 limits the current flowing through diode D2 when Freewheeling drain voltage is high;
5) D1 could be necessary to protect INHIBIT pin from negative voltages.
6) D2 could be necessary to protect INHIBIT pin from voltages higher than V
CC
7) D3 could be necessary to protect CK pin from voltages higher than V
CC
.
8) SGLGND layout trace must not include OUT
GATE1,2
current paths.
9) A capacitor in parallel with R4 could be necessary to eliminate turn off voltage spike.
STSR2P/STSR2PM
6/12
EXAMPLE OF COMPONENTS SELECTION FOR A FORWARD CONVERTER
Forward Specification:
V
IN
=36-72V
V
OUT
=3.3V
n=Np/Ns=4.5
R
3
and R
4
are calculated assuring a minimum voltage of 2.8V at CK pin. At 36V input, the voltage on the
secondary winding is 36/4.5=8V. Choosing R
3
=1.5K,R
4
results to be:
R
4
=1k is chosen. At 72V input the current at CK pin is calculated as:
This value is below the maximum allowable current flowing into the CK pin (10mA). If the 10mA value is
exceeded an external diode connected to V
CC
must be added (D3).
R
1
and R
2
values set the anticipation time for OUT
GATE2
.ForR
1
=and R
2
=0, t
ANT2
=75ns; for
R
1
=R
2
=10k,t
ANT2
=150ns; for R
1
=0 and R
2
=,t
ANT2
=225ns.
The RC group composed by R
5
and the parasitic capacitance of Inhibit pin (typically 5pF) delays the
signal on Inhibit comparator. This delay must be lower than 200ns. This condition imposes a maximum
value for R
5
of about 20k.
In general a suggested value for R
5
is 10k. At 72V input, the secondary voltage is 16V, so the maximum
current flowing into Inhibit pin is 16V/10k=1.6mA which is below the maximum allowable current for the
pin (10mA). If the 10mA value is exceeded an external diode (D2) connected to V
CC
must be added.
The maximum negative voltage of –0.6V must be guaranteed for the Inhibit pin. If this negative voltage is
exceeded the current must be limited to 50mA. If necessary, a diode (D1) connected to SGLGND can be
added to satisfy this specification.
INHIBIT OPERATION OF OUT
GATE2
IN DISCONTINUOUS CONDUCTION MODE
R
4
V
CK
R
3
×
V
IN
I
CK 2.8()
R
3
V
CK
×
----------------------------------------------------------------
1k
2.8V 1.5k()×
8V 220µA 1.5k 2.8V×
--------------------------------------------------------------------------
× 862==
I
CK
V
IN max()
V
CC
0.3
R
3
-----------------------------------------------------
16 5 0.3
1.5k
------------------------------
7.13mA===

STSR2PCD-TR

Mfr. #:
Manufacturer:
STMicroelectronics
Description:
Switching Controllers Smart Driver
Lifecycle:
New from this manufacturer.
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