OMO ElectronicOMO Electronic
Expand menu
0 Cart

STSR2PCD

P1-P3P4-P6P7-P9P10-P12
1/12September 2003
■ SUPPLY VOLTAGE RANGE: 4.5V TO 5.5V
■ TYPICAL PEAK OUTPUT CURRENT:
SOURCE -2A, SINK 3.5A
■ OPERATING FREQUENCY: 20 TO 750 KHZ
■ SMART TURN-OFF ANTICIPATION TIMING
■ OPERATION INDEPENDENT FROM THE
FORWARD MAGNETIC RESET TECHNIQUE
■ POSSIBILITY TO OPERATE IN
DISCONTINUOUS MODE
DESCRIPTION
STSR2P Smart Driver IC provides two
complementary high current outputs to drive
Power Mosfets. The IC is dedicated to properly
drive secondary Synchronous Rectifiers in
medium power, low output voltage, high efficiency
Forward Converters. From a synchronizing clock
input, STSR2P generates two driving signals with
the self-setting of dead time between
complementary pulses. The IC operation prevents
secondary side shoot-through conditions
providing proper timing at the outputs turn-off
transition. This smart function operates through a
fast cycle-after-cycle control logic mechanism
based on an internal high frequency oscillator,
synchronized by the clock signal. A fixed
anticipation in turning-off the OUT
GATE1
with
respect to the clock signal transition is provided,
while the anticipation in turning off the OUT
GATE2
can be set through external components. The
adopted transitions revelation mechanism makes
circuit operation independent by the forward
magnetic reset technique used, avoiding most of
the common problems inherent in self-driven
synchronous rectifiers. A special Inhibit function
allows the shut-off of OUT
GATE2
. This feature
makes discontinuous conduction mode possible
and prevents the freewheeling mosfet from
sinking current from the output.
STSR2P automatically turns off the outputs when
duty-cycle is lower than 13%, while STSR2PM
works even at very low duty-cycle values.
STSR2P/
STSR2PM
FORWARD SYNCHRONOUS
RECTIFIERS SMART DRIVER
PEAK
DETECTOR
BIAS
UVLO
CK
Vcc
6
5.7V
8
4
2
OUTPUT
BUFFERS
7
OUTGate2
PWRGND
SGLGND
ANTICIPATION
SET
3
SETANT2
5
INHIBIT
25mV
-
+
DIGITAL
CONTROL
HIGH
FREQUENCY
OSCILLATOR
1 OUTGate1
+
+
+
SCHEMATIC DIAGRAM
SO-8
STSR2P/STSR2PM
2/12
ABSOLUTE MAXIMUM RATINGS
Absolute Maximum Ratings are those values beyond which damage to the device may occur. Functional operation under these condition is
not implied.
(*) A higher positive voltage level can be applied to the pin with a resistor which limits the current flowing into the pin to 10mA maximum
THERMAL DATA
(*) This value is referred to one layer pcb board with minimum copper connections for the leads. a minimum value of 120 °C/W can be
obtained improving thermal conductivity of the board
ORDERING CODES
CONNECTION DIAGRAM (top view)
Symbol Parameter Value Unit
V
CC
DC Input Voltage
-0.3 to 6 V
V
OUTGATE
Max Gate Drive Output Voltage -0.3 to V
CC
V
V
INHIBIT
Max INHIBIT Voltage (*) -0.6 to V
CC
V
V
CK
Clock Input Voltage Range (*) -0.3 to V
CC
V
I
LX
Switching Peak Current
2A
P
TOT
Continuous Power Dissipation at T
A
=105°C without heatsink 270 mW
ESD Human Body Model Pins 1,2, 4, 5, 6, 7, 8 ±1KV
Pin 3 ±0.9 KV
T
stg
Storage Temperature Range
-55 to +150 °C
T
op
Operating Junction Temperature Range -40 to +125 °C
Symbol Parameter SO-8 Unit
R
thj-amb
Thermal Resistance Junction-case
40 °C/W
R
thj-amb
Thermal Resistance Junction-ambient (*)
160 °C/W
TYPE SO-8 SO-8 (T&R)
STSR2P STSR2PCD STSR2PCD-TR
STSR2PM STSR2PMCD STSR2PMCD-TR
STSR2P/STSR2PM
3/12
PIN DESCRIPTION
Pin N° Symbol Name and Function
1OUT
GATE1
Gate Drive signal for Rectifier MOSFET. Anticipation (t
ANT1
) in turning off
OUT
GATE1
is provided when the clock input goes to low level.
2V
CC
The supply voltage range from 4.5V to 5.5V allows applications with logic gate
threshold mosfets. UVLO feature guarantees proper start-up while it avoids
undesirable driving during eventual dropping of the supply voltage.
3 SET
ANT2
The voltage on this pin sets the anticipation (t
ANT1
) in turning off the OUT
GATE2
.It
is possible to choose among three different anticipation times by discrete
partitioning of the supply voltage.
4 CK This input provides synchronization for IC’s operations, being the transitions
between the two output conditions based on a positive threshold, equal for the
two slopes. A smart internal control logic mechanism using a 15MHz internal
oscillator generates proper anticipation timing at the turn-off of each output. This
feature allows safe turn-off of Synchronous Rectifiers avoiding any eventual
shoot-through situation on secondary side at both transitions. Smart clock
revelation mechanism makes these operations independent by false triggering
pulses generated in light load conditions and by particular demagnetization
techniques.Absolute maximum voltage rating of the pin can be exceeded limiting
the current flowing into the pin to 10mA max.
5 INHIBIT This input enables OUT
GATE2
to work when its voltage is lower than the negative
threshold voltage (V
INHIBIT
<V
H
). If V
INHIBIT
>V
H
the OUT
GATE2
will be high for a
minimum conduction time (t
ON(GATE2)
). In typical forward converter application, it
is possible to turn off the freewheeling MOSFET when the current through it tends
to reverse, allowing discontinuous conduction mode and providing protection to
the converter from eventual sinking current from the load.Absolute maximum
voltage rating of the pin can be exceeded limiting the current flowing into the pin
to 10mA max.
6 SGLGND Reference for all the control logic signals. This pin is completely separated from
the PWRGND to prevent eventual disturbances to affect the control logic.
7OUT
GATE2
Gate Drive signal for Freewheeling MOSFET. Anticipation [t
ANT2
] in turning off
OUT
GATE2
is provided when the clock input goes to high level.
8 PWRGND Reference for power signals, this pin carries the full peak currents for the two
outputs.
P1-P3P4-P6P7-P9P10-P12

STSR2PCD

Mfr. #:
Buy STSR2PCD
Manufacturer:
STMicroelectronics
Description:
Switching Controllers Smart Driver
Lifecycle:
New from this manufacturer.
Delivery:
DHL FedEx Ups TNT EMS
Payment:
T/T Paypal Visa MoneyGram Western Union

Products related to this Datasheet