PROTECTION PRODUCTS
1
www.semtech.com
PRELIMINARY
PROTECTION PRODUCTS - RailClamp
®®
®®
®
RClamp0522T
RClamp0524T
Ultra Low Capacitance TVS Arrays
Description
Features
Circuit Diagram - RClamp0522T Circuit Diagram - RClamp0524T
Revision 07/01/2010
RailClamps
®
series consists of ultra low capacitance
TVS arrays designed to protect high speed data inter-
faces. This series has been specifically designed to
protect sensitive components which are connected to
high-speed data and transmission lines from overvolt-
age caused by ESD (electrostatic discharge), CDE
(Cable Discharge Events), and EFT (electrical fast
transients).
The RClamp
®
0522T and RClamp
®
0524T have a typical
capacitance of only 0.30pF between I/O pins. This
allows it to be used on circuits operating in excess of
3GHz without signal attenuation. They may be used to
meet the ESD immunity requirements of IEC 61000-4-
2, Level 4 (±15kV air, ±8kV contact discharge). The
RClamp0522T is designed to protect two lines, while
the RClamp0524T will protect four lines.
The RClamp0522T is in a 6-pin, SLP1610P4T package.
It measures 1.6 x 1.0 with a nominal height of 0.4mm.
The RClamp0524T is in a 10-pin, SLP2510P8T package.
It measures 2.5 x 1.0 with a nominal height of 0.4mm.
The leads are spaced at a pitch of 0.5mm and are fin-
ished with lead-free NiPdAu. They are designed for easy
PCB layout by allowing the traces to run straight through
the device. The combination of small size, low capaci-
tance, and high level of ESD protection makes them a
flexible solution for applications such as HDMI,
DisplayPort
TM
, MDDI, and eSATA interfaces.
Applications
Mechanical Characteristics
High Definition Multi-Media Interface (HDMI)
Digital Visual Interface (DVI)
DisplayPort
TM
Interface
MDDI Ports
PCI Express
eSATA Interfaces
ESD protection for high-speed data lines to
IEC 61000-4-2 (ESD) ±15kV (air), ±8kV (contact)
IEC 61000-4-5 (Lightning) 5A (8/20μs)
IEC 61000-4-4 (EFT) 40A (5/50ns)
Package design optimized for high speed lines
Flow-Through design
Protects two or four I/O lines
Low capacitance: 0.3pF typical (I/O to I/O)
Low clamping voltage
Low operating voltage: 5V
Solid-state silicon-avalanche technology
SLP1610P4T 6-pin package (1.6 x 1.0 x 0.40mm)
SLP2510P8T 10-pin package (2.5 x 1.0 x 0.40mm)
Pb-Free, Halogen Free, RoHS/WEEE Compliant
Lead Pitch: 0.5mm
Lead finish: NiPdAu
Marking: Marking Code
Packaging: Tape and Reel
4-Line Protection2-Line Protection
Pin 1 Pin 2
3, 4
Pin 1 Pin 2 Pin 4 Pin 5
3, 8
