NLVSV2T244DMR2G

© Semiconductor Components Industries, LLC, 2016
March, 2016 − Rev. 4
1 Publication Order Number:
NLSV2T244/D
NLSV2T244
2-Bit Dual-Supply
Non-Inverting Level
Translator
The NLSV2T244 is a 2−bit configurable dual−supply voltage level
translator. The input A
n
and output B
n
ports are designed to track two
different power supply rails, V
CCA
and V
CCB
respectively. Both
supply rails are configurable from 0.9 V to 4.5 V allowing universal
low−voltage translation from the input A
n
to the output B
n
port.
Features
Wide V
CCA
and V
CCB
Operating Range: 0.9 V to 4.5 V
High−Speed w/ Balanced Propagation Delay
Inputs and Outputs have OVT Protection to 4.5 V
Non−preferential V
CCA
and V
CCB
Sequencing
Outputs at 3−State until Active V
CC
is Reached
Power−Off Protection
Outputs Switch to 3−State with V
CCB
at GND
Small Packaging: UDFN8, SO−8, Micro8
These Devices are Pb−Free, Halogen Free/BFR Free and are RoHS
Compliant
Typical Applications
Mobile Phones, PDAs, Other Portable Devices
Important Information
ESD Protection for All Pins:
HBM (Human Body Model) > 5000 V
UDFN8
MU SUFFIX
CASE 517AJ
MARKING
DIAGRAMS
www.
onsemi.com
Device Package Shipping
ORDERING INFORMATION
NLSV2T244MUTAG UDFN8
(Pb−Free)
3000 / Tape &
Reel
For information on tape and reel specifications,
including part orientation and tape sizes, please
refer to our Tape and Reel Packaging Specification
Brochure, BRD8011/D.
1
8
UP = Specific Device Code
M = Date Code
G = Pb−Free Package
UPM
G
1
8
SO−8
D SUFFIX
CASE 751
A = Assembly Location
Y = Year
W = Work Week
G = Pb−Free Package
2T244
ALYW G
G
1
8
Micro8
DM SUFFIX
CASE 846A
1
244
AYW G
G
1
8
NLSV2T244DR2G SO−8
(Pb−Free)
2500 / Tape &
Reel
NLSV2T244DMR2G Micro8
(Pb−Free)
4000 / Tape &
Reel
A = Assembly Location
L = Wafer Lot
Y = Year
W = Work Week
G = Pb−Free Package
NLSV2T244
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2
Figure 1. Logic Diagram
V
CCA
V
CCB
B1
B2
OE
A2
A1
PIN ASSIGNMENTS
UDFN8
(Top View)
V
CCB
B1
B2
GND
V
CCA
A1
A2
OE
8
7
6
5
1
2
3
4
Micro8
(Top View)
1
2
3
4
8
7
6
5
1 8
2
3
4
7
6
5
SOIC−8
(Top View)
V
CCB
B1
B2
GND
V
CCA
A1
A2
OE
V
CCB
B1
B2
GND
V
CCA
A1
A2
OE
PIN ASSIGNMENT
PIN FUNCTION
V
CCA
Input Port DC Power Supply
V
CCB
Output Port DC Power Supply
GND Ground
A
n
Input Port
B
n
Output Port
OE Output Enable
Inputs Outputs
OE A
n
B
n
TRUTH TABLE
LLL
LHH
H X 3−State
NLSV2T244
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3
MAXIMUM RATINGS
Symbol Rating Value Condition Unit
V
CCA
, V
CCB
DC Supply Voltage −0.5 to +5.5 V
V
I
DC Input Voltage A
n
−0.5 to +5.5 V
V
C
Control Input OE −0.5 to +5.5 V
V
O
DC Output Voltage (Power Down) B
n
−0.5 to +5.5 V
CCA
= V
CCB
= 0 V
(Active Mode) B
n
−0.5 to +5.5 V
(Tri−State Mode) B
n
−0.5 to +5.5 V
I
IK
DC Input Diode Current −20 V
I
< GND mA
I
OK
DC Output Diode Current −50 V
O
< GND mA
I
O
DC Output Source/Sink Current ±50 mA
I
CCA
, I
CCB
DC Supply Current Per Supply Pin ±100 mA
I
GND
DC Ground Current per Ground Pin ±100 mA
T
STG
Storage Temperature −65 to +150 °C
Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality
should not be assumed, damage may occur and reliability may be affected.
RECOMMENDED OPERATING CONDITIONS
Symbol Parameter Min Max Unit
V
CCA
, V
CCB
Positive DC Supply Voltage 0.9 4.5 V
V
I
Bus Input Voltage GND 4.5 V
V
C
Control Input OE GND 4.5 V
V
IO
Bus Output Voltage (Power Down Mode) B
n
GND 4.5 V
(Active Mode) B
n
GND V
CCB
V
(Tri−State Mode) B
n
GND 4.5 V
T
A
Operating Temperature Range −40 +85 °C
Dt / DV
Input Transition Rise or Rate
V
I
, from 30% to 70% of V
CC
; V
CC
= 3.3 V ±0.3 V
0 10 nS
Functional operation above the stresses listed in the Recommended Operating Ranges is not implied. Extended exposure to stresses beyond
the Recommended Operating Ranges limits may affect device reliability.

NLVSV2T244DMR2G

Mfr. #:
Manufacturer:
ON Semiconductor
Description:
Translation - Voltage Levels 2 BIT UNIDIR TRANSLATOR
Lifecycle:
New from this manufacturer.
Delivery:
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Payment:
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