9397 750 14401 © Koninklijke Philips Electronics N.V. 2005. All rights reserved.
Product data sheet Rev. 03 — 17 January 2005 9 of 17
Philips Semiconductors
74LVT162374
3.3 V 16-bit edge-triggered D-type flip-flop
[1] All typical values are at V
CC
= 3.3 V and T
amb
= 25 °C.
[1] All typical values are at V
CC
= 3.3 V and T
amb
= 25 °C.
t
PHL
propagation delay
nCP to nQn
see Figure 6
V
CC
= 3.3 V ± 0.3 V 1.5 3.0 4.9 ns
V
CC
= 2.7 V - - 5.1 ns
t
PZH
output enable time to
HIGH-level
see Figure 7
V
CC
= 3.3 V ± 0.3 V 1.5 3.5 5.6 ns
V
CC
= 2.7 V - - 6.9 ns
t
PZL
output enable time to
LOW-level
see Figure 8
V
CC
= 3.3 V ± 0.3 V 1.5 3.2 4.9 ns
V
CC
= 2.7 V - - 6.0 ns
t
PHZ
output disable time from
HIGH-level
see Figure 7
V
CC
= 3.3 V ± 0.3 V 1.5 3.5 5.4 ns
V
CC
= 2.7 V - - 5.7 ns
t
PLZ
output disable time from
LOW-level
see Figure 8
V
CC
= 3.3 V ± 0.3 V 1.5 3.2 5.0 ns
V
CC
= 2.7 V - - 5.1 ns
Table 8: Dynamic characteristics
…continued
GND = 0 V; t
r
= t
f
= 2.5 ns; C
L
= 50 pF; R
L
= 500
Ω
; for test circuit see Figure 10.
Symbol Parameter Conditions Min Typ Max Unit
Table 9: Dynamic characteristics set-up requirements
GND = 0 V; t
r
= t
f
= 2.5 ns; C
L
= 50 pF; R
L
= 500
Ω
.
Symbol Parameter Conditions Min Typ Max Unit
T
amb
= −40 °C to +85 °C
[1]
t
su(H)
, t
su(L)
set-up time nDn to nCP see Figure 9
V
CC
= 3.3 V ± 0.3 V 2.0 0.7 - ns
V
CC
= 2.7 V 2.0 - - ns
t
h(H)
, t
h(L)
hold time nDn to nCP see Figure 9
V
CC
= 3.3 V ± 0.3 V 0.8 0 - ns
V
CC
= 2.7 V 0.1 - - ns
t
W(H)
nCP pulse width HIGH see Figure 6
V
CC
= 3.3 V ± 0.3 V 1.5 0.6 - ns
V
CC
= 2.7 V 1.5 - - ns
t
W(L)
nCP pulse width LOW see Figure 6
V
CC
= 3.3 V ± 0.3 V 3.0 1.6 - ns
V
CC
= 2.7 V 3.0 - - ns
