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ADG1233YCPZ-REEL

P1-P3P4-P6P7-P9P10-P12P13-P15P16-P17
Low Capacitance, Triple/Quad SPDT
±15 V/+12 V iCMOS Switches
Data Sheet
ADG1233/ADG1234
Rev. D Document Feedback
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarks and registered trademarks are the property of their respective owners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700 ©2006–2016 Analog Devices, Inc. All rights reserved.
Technical Support www.analog.com
FEATURES
1.5 pF off capacitance
0.5 pC charge injection
33 V supply range
120 Ω on resistance
Fully specified at ±15 V/+12 V
3 V logic-compatible inputs
Rail-to-rail operation
Break-before-make switching action
16-lead TSSOP, 20-lead TSSOP, and 4 mm × 4 mm LFCSP
Typical power consumption (<0.03 μW)
APPLICATIONS
Audio and video routing
Automatic test equipment
Data acquisition systems
Battery-powered systems
Sample-and-hold systems
Communication systems
FUNCTIONAL BLOCK DIAGRAMS
ADG1233
S1B
D1
S1A
S2A
IN2IN1 IN3
D2
S2B
S3A
D3
S3B
SWITCHES SHOWN FOR A LOGIC 1 INPUT
05743-001
LOGIC
EN
Figure 1.
SWITCHES SHOWN FOR A LOGIC 1 INPUT
05743-038
ADG1234
S1B
D1
S1A
S2A
IN2IN1 IN3
D2
S2B
S4B
D4
S4A
S3A
D3
S3B
LOGIC
EN
IN4
Figure 2.
GENERAL DESCRIPTION
The ADG1233 and ADG1234 are monolithic iCMOS® analog
switches comprising three independently selectable single-pole,
double throw SPDT switches and four independently selectable
SPDT switches, respectively.
All channels exhibit break-before-make switching action
preventing momentary shorting when switching channels. An
EN
input on the ADG1233 and ADG1234 enables or disables
the device. When disabled, all channels are switched off.
The iCMOS (industrial-CMOS) modular manufacturing process
combines a high voltage complementary metal-oxide semi-
conductor (CMOS) and bipolar technologies. It enables the
development of a wide range of high performance analog ICs
capable of 33 V operation in a footprint that no other generation of
high voltage devices has been able to achieve.
Unlike analog ICs using conventional CMOS processes, iCMOS
components can tolerate high supply voltages while providing
increased performance, dramatically lowered power consumption,
and reduced package size.
The ultralow capacitance and charge injection of these multiplexers
make them ideal solutions for data acquisition and sample-and-
hold applications, where low glitch and fast settling are required.
Fast switching speed coupled with high signal bandwidth make the
devices suitable for video signal switching. iCMOS construction
ensures ultralow power dissipation, making the devices ideally
suited for portable and battery-powered instruments.
PRODUCT HIGHLIGHTS
1. 1.5 pF off capacitance (±15 V supply).
2. 0.5 pC charge injection.
3. 3 V logic-compatible digital input, VIH = 2.0 V, VIL = 0.8 V.
4. 16-lead TSSOP, 20-lead TSSOP, and 4 mm × 4 mm LFCSP.
ADG1233/ADG1234 Data Sheet
Rev. D | Page 2 of 17
TABLE OF CONTENTS
Features .............................................................................................. 1
Applications ....................................................................................... 1
Functional Block Diagrams ............................................................. 1
General Description ......................................................................... 1
Product Highlights ........................................................................... 1
Revision History ............................................................................... 2
Specifications ..................................................................................... 3
Dual Supply ................................................................................... 3
Single Supply ................................................................................. 5
Absolute Maximum Ratings ............................................................7
ESD Caution...................................................................................7
Pin Configurations and Function Descriptions ............................8
Terminology .................................................................................... 10
Typical Performance Characteristics ........................................... 11
Test Circuits ..................................................................................... 14
Outline Dimensions ....................................................................... 16
Ordering Guide .......................................................................... 17
REVISION HISTORY
8/2016—Rev. C to Rev. D
Changes to Analog Inputs Parameter and Digital Inputs
Parameter, Table 3 ............................................................................. 7
Updated Outline Dimensions ....................................................... 17
3/2016—Rev. B to Rev. C
Changes to Figure 5 and Figure 6 ................................................... 9
Updated Outline Dimensions ....................................................... 17
Changes to Ordering Guide .......................................................... 17
2/2009—Rev. A to Rev. B
Change to I
DD
Parameter, Table 1 ................................................... 4
Change to I
DD
Parameter, Table 2 ................................................... 6
Updated Outline Dimensions ....................................................... 16
8/2006—Rev. 0 to Rev. A
Updated Format ................................................................ \Universal
Changes to Table 1 .......................................................................... 13
Changes to Table 2 .......................................................................... 14
Changes to Figure 11 .................................................................... 110
Changes to Figure 12 .................................................................... 111
1/2006—Revision 0: Initial Version
Data Sheet ADG1233/ADG1234
Rev. D | Page 3 of 17
SPECIFICATIONS
DUAL SUPPLY
V
DD
= +15 V ± 10%, V
SS
= −15 V ± 10%, GND = 0 V, unless otherwise noted.
Table 1.
Parameter
Y Version
1
Unit Test Conditions/Comments
+25°C
−40°C to +85°C
−40°C to +125°C
ANALOG SWITCH
Analog Signal Range
V
SS
to V
DD
V
On Resistance (R
ON
)
120
Ω typ V
S
= ±10 V, I
S
= −1 mA; see Figure 24
190 230 260 Ω max V
DD
= +13.5 V, V
SS
= −13.5 V
On Resistance Match Between
Channels (∆R
ON
)
3.5
Ω typ V
S
= ±10 V, I
S
= −1 mA
6 10 12 Ω max
On Resistance Flatness (R
FL AT (O N)
)
20
Ω typ V
S
= −5 V, 0 V, +5 V; I
S
= −1 mA
60 72 79 Ω max
LEAKAGE CURRENTS
V
DD
= +16.5 V, V
SS
= −16.5 V
Source Off Leakage I
S
(Off )
±0.02
nA typ V
D
= ±10 V, V
S
= −10 V; see Figure 25
±0.1 ±0.6 ±1 nA max
Drain Off Leakage I
D
(Off )
±0.02
nA typ V
S
= 1 V/10 V, V
D
= 10 V/1 V;
see Figure 25
±0.1 ±0.6 ±1 nA max
Channel On Leakage I
D,
I
S
(On)
±0.02
nA typ V
S
= V
D
= ±10 V; see Figure 26
±0.2 ±0.6 ±1 nA max
DIGITAL INPUTS
Input High Voltage, V
INH
2.0 V min
Input Low Voltage, V
INL
0.8 V max
Input Current
I
INL
or I
INH
±0.005
µA typ V
IN
= V
INL
or V
INH
±0.1 µA max
Digital Input Capacitance, C
IN
3
pF typ
DYNAMIC CHARACTERISTICS
2
t
TRANSITION
110
ns typ R
L
= 300 Ω, C
L
= 35 pF
130 150 170 ns max V
S
= 10 V; see Figure 27
t
BBM
25
ns typ R
L
= 300 Ω, C
L
= 35 pF
10 ns min V
S1
= V
S2
= +10 V; see Figure 28
t
ON
(
EN
)
120
ns typ R
L
= 300 Ω, C
L
= 35 pF
140 170 195 ns max V
S
= 10 V; see Figure 29
t
OFF
(
EN
)
40
ns typ R
L
= 300 Ω, C
L
= 35 pF
45 55 60 ns max V
S
= 10 V; see Figure 29
Charge Injection
0.5
pC typ V
S
= 0 V, R
S
= 0 Ω, C
L
= 1 nF;
see Figure 30
Off Isolation
−80
dB typ R
L
= 50 Ω, C
L
= 5 pF, f = 1 MHz; see
Figure 31
Channel-to-Channel Crosstalk
−85
dB typ
R
L
= 50 Ω, C
L
= 5 pF, f = 1 MHz;
see Figure 33
Total Harmonic Distortion, THD + N 0.14
% typ R
L
= 10 kΩ, 5 V rms, f = 20 Hz to
20 kHz; see Figure 34
−3 dB Bandwidth
900
MHz typ R
L
= 50 Ω, C
L
= 5 pF; see Figure 32
C
S
(Off )
1.5
pF typ f = 1 MHz; V
S
= 0 V
1.7
pF max f = 1 MHz; V
S
= 0 V
C
D
(Off )
1.6
pF typ f = 1 MHz; V
S
= 0 V
1.8
pF max f = 1 MHz; V
S
= 0 V
P1-P3P4-P6P7-P9P10-P12P13-P15P16-P17

ADG1233YCPZ-REEL

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IC SWITCH TRIPLE SPDT 16LFCSP
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