7
IXA531
LO1,2,3
HO1,2,3
FLT
RST
ITRP
EN
HIN1,2,3
LIN1,2,3
HIN1,2,3
Fi
g
. (5) Timin
g
Dia
g
ram
50%
EN
EN
t
LO1,2,3
HO1,2,3
90%
Fi
g
. (6) Enable Timin
g
Waveforms
t
90%
f
t
off
50%
PWM
IN
50%
50%
OUT
90%
PWM
50%
t
on
t
r
10%10%
LO1,2,3
HO1,2,3
LIN1,2,3
HIN1,2,3
HIN1,2,3
LIN1,2,3
Fig. 3. Timing Diagram
Fig. 4. ENABLE Timing Waveforms
Fig. 5. Switching Time Definitions
8
IXA531
FLT
Fi
g
. (10) Input Filter Dia
g
ram
low
Fig. (9) ITRP / RST Waveforms
FILIN
high
HO / LO
HIN / LIN
on
off
t
on
FLT
OUTPUT
t
ITRP
t
50%
90%
off on
off
FILIN
t
FLCLR
t
50%
ITRP
50%
RST
50%
HO1,2,3
LO1,2,3
Fi
g
. (8) Deadtime Waveforms
DT
50%
RST,th+
V
DT
50%
50%
HIN1,2,3
LIN1,2,3
HIN1,2,3
LIN1,2,3
50%
50%
Fig. 6. Deadtime Waveforms
Fig. 7. ITRP / RST Waveforms
Fig. 8. ENABLE Timing Waveforms
9
IXA531
Fig. (9) IXA531 Block Diagram
1
RST
600mA
Gate
Driver
Gate
600mA
Driver
Gate
600mA
Driver
Isolated Hi
g
h Side
Isolated Hi
g
h Side
Isolated Hi
h Side
HS3
HGO3
VCH3
HS2
HGO2
VCH2
HS1
HGO1
VCH1
iO2
h02
en2
lin1
en1
hin1
iO3
h03
lin3
en3
hin3
lin2
hin2
iO1
h01
VCL
VCL
VCL
VCL
VCL
VCL
VCH
VCL
600mA
Driver
Gate
HS
UVCC
Detect
In
Low to High
Isolation
Out
Rst
VCH
VCL
600mA
Driver
Gate
HS
UVCC
Detect
In
In
Low to High
Isolation
Out
Rst
VCL
CMOS
to VCL
Level Shift , &
Logic
Conduction
Anti-Cross
5V LOGIC
VCL
5V LOGIC
Level Shift , &
CMOS
to VCL
Logic
Conduction
Anti-Cross
VCH
VCL
600mA
Driver
Gate
HS
UVCC
Detect
In
In
Low to High
Isolation
Out
Rst
VCL
5V LOGIC
Anti-Cross
Level Shift , &
to VCL
CMOS
Logic
Conduction
Isolated High Side
Isolated High Side
Isolated High Side
HS3
HGO3
VCH3
HS2
HGO2
VCH2
HS1
HGO1
VCH1
iO2
h02
en2
lin1
en1
hin1
iO3
h03
lin3
en3
hin3
lin2
hin2
iO1
h01
VCL
VCL
VCL
VCL
VCL
VCL
VCH
VCL
600mA
Driver
Gate
HS
UVCC
Detect
In
Low to High
Isolation
Out
Rst
VCH
VCL
600mA
Driver
Gate
HS
UVCC
Detect
In
Low to High
Isolation
Out
Rst
VCL
CMOS
to VCL
Level Shift , &
Logic
Conduction
Anti-Cross
5V LOGIC
VCL
5V LOGIC
Level Shift , &
CMOS
to VCL
Logic
Conduction
Anti-Cross
VCH
VCL
600mA
Driver
Gate
HS
UVCC
Detect
In
In
Low to High
Isolation
Out
Rst
VCL
5V LOGIC
Anti-Cross
Level Shift , &
to VCL
CMOS
Logic
Conduction
HIN1
LIN1
HIN2
LIN2
HIN3
LIN3
EN
ITRP
FLT
DG
S
R
QB
Set
Dominant
Latch
+
-
N
N
VCL
OUT
UVCL
Detect
VCL
LGO1
LGO2
LGO3
In
In
In
In
In
In
Out
Out
Out
Low to High
Equalizer
Delay
Low to High
Delay
Equalizer
Low to High
Delay
Equalizer
LS
-
0.5 V
+
VCLVCL
50K
VCLVCL
50K
VCLVCL
750K
750K
750K
750K
750K
750K

IXA531L4T/R

Mfr. #:
Manufacturer:
Description:
IC BRIDGE DRVR 3PH 500MA 44-PLCC
Lifecycle:
New from this manufacturer.
Delivery:
DHL FedEx Ups TNT EMS
Payment:
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