LTC1043
7
1043fa
Figure 4. Individual Switch Charge Injection
vs Input Voltage
Figure 5. Printed Circuit Board Layout
Showing Shielding the Sampling Capacitor
Figure 6. Internal Oscillator
APPLICATIO S I FOR ATIO
WUUU
V
IN
(V)
0
0
CHARGE INJECTION (pCb)
2
4
6
8
48
12
16
LTC1043 • AI04
10
12
26
10
14
V
+
= 15V
V
–
= 0V
V
+
= 10V
V
–
= 0V
V
+
= 5V
V
–
= 0V
LTC1043 • AI05
1
2
3
C
S
OUTSIDE FOIL
PRINTED CIRCUIT
BOARD AREA
LTC1043
recover from the latch mode when the input drops 3V to 4V
below the voltage value which caused the latch. For
instance, if an external resistor of 200Ω is connected in
series with an input pin, the input can be taken 1.3V above
the supply without latching the IC. The same applies for the
C
+
and C
–
pins.
C
OSC
Pin (16), Figure 6
The Cosc pin can be used with an external capacitor, Cosc,
connected from Pin 16 to Pin 17, to modify the internal
oscillator frequency. If Pin 16 is floating, the internal 24pF
capacitor, plus any external interpin capacitance, set the
oscillator frequency around 190kHz with ±5V supply. The
typical performance characteristics curves provide the
necessary information to set the oscillator frequency for
various power supply ranges. Pin 16 can also be driven
with an external clock to override the internal oscillator.
Although standard 7400 series CMOS gates do not
guarantee CMOS levels with the current source and sink
requirements of Pin 16, they will in reality drive the Cosc
pin. CMOS gates conforming to standard B series output
drive have the appropriate voltage levels and more than
enough output current to simultaneously drive several
LTC1043 C
OSC
pins. The typical trip levels of the Schmitt
trigger (Figure 6) are given below.
LTC1043 * AI06
24pF
17
16
4
C
OSC
(EXTERNAL)
f
OSC
= 190kHz •
(24pF)
(24pF + C
OSC
)
C
OSC
V
+
V
–
38µF
TO CLK GENERATOR
SUPPLY TRIP LEVELS
V
+
= 5V, V
–
= 0V V
H
= 3.4VV
L
= 1.35V
V
+
= 10V, V
–
= 0V V
H
= 6.5VV
L
= 2.8V
V
+
= 15V, V
–
= 0V V
H
= 9.5VV
L
= 4.1V