852911I Data Sheet
©2016 Integrated Device Technology, Inc Revision A January 21, 20167
FIGURE 2C. HSTL_CLK/nHSTL_CLK
INPUT DRIVEN BY 3.3V LVPECL DRIVER
FIGURE 2B. HSTL_CLK/nHSTL_CLK
INPUT DRIVEN BY 3.3V LVPECL DRIVER
FIGURE 2D. HSTL_CLK/nHSTL_CLK
INPUT DRIVEN BY 3.3V LVDS DRIVER
3.3V
R1
50
R3
50
Zo = 50 Ohm
LVPECL
Zo = 50 Ohm
HiPerClockS
CLK
nCLK
3.3V
Input
R2
50
Zo = 50 Ohm
Input
HiPerClockS
CLK
nCLK
3.3V
R3
125
R2
84
Zo = 50 Ohm
3.3V
R4
125
LVPECL
R1
84
3.3V
DIFFERENTIAL CLOCK INPUT INTERFACE
The HSTL_CLK/nHSTL_CLK accepts LVDS, LVPECL, HSTL,
SSTL, HCSL and other differential signals. Both V
SWING
and V
OH
must meet the V
PP
and V
CMR
input requirements. Figures 2A to 2E
show interface examples for the HSTL_CLK/nHSTL_CLK input
driven by the most common driver types. The input interfaces
FIGURE 2A. HSTL_CLK/nHSTL_CLK
INPUT DRIVEN BY HSTL DRIVER
suggested here are examples only. Please consult with the
vendor of the driver component to confi rm the driver termination
requirements. For example in Figure 2A, the input termination
applies for HSTL drivers. If you are using an HSTL driver from
another vendor, use their termination recommendation.
1.8V
R2
50
Input
LVHSTL Driver
ICS
HiPerClockS
R1
50
LVHSTL
3.3V
Zo = 50 Ohm
Zo = 50 Ohm
HiPerClockS
CLK
nCLK
FIGURE 2E. HSTL_CLK/nHSTL_CLK
INPUT DRIVEN BY 3.3V LVPECL DRIVER WITH
AC COUPLE
Zo = 50 Ohm
R3
125
HiPerClockS
CLK
nCLK
3.3V
R5
100 - 200
3.3V
R2
84
3.3V
R6
100 - 200
Input
R5,R6 locate near the driver pin.
Zo = 50 Ohm
R1
84
R4
125
C2
LVPECL
C1
Zo = 50 Ohm
R1
100
3.3V
LVDS_Driv er
Zo = 50 Ohm
Receiv er
CLK
nCLK
3.3V
