L9935 Functional description
Doc ID 5198 Rev 10 19/29
5.12 Limitation of the diagnosis
The diagnosis depends on either detecting an overcurrent of more than typically 1.8 A
through the source transistor or on not detecting a flyback pulse, or on detecting severe
overcurrents of the sink transistor immediately after turn on.
Small currents bypassing the load will not be detected.
In the low current range (hold current) the flyback pulse (especially commutating
against the supply voltage after changing phase) may (depending on the inductivity of
the stepper motor windings) be too short to be detected correctly. For this reason
diagnosis using the flyback pulse is blanked at phase reversal at hold current.
In the low current range (hold current) the current capability of the bridge is reduced on
purpose. Short to V
S
may not be detected. In stead the bridge may just chop like
normal operation.
Flyback pulse detection is not blanked during PWM regulation at hold current (here
commutation voltage is less than 1V thus providing a longer pulse duration.) This
however should be taken in account using stepper motors with low inductivity (less than
0.5mH). Using motors with such a low inductivity the flyback voltage in hold mode may
decay too fast.
Motors with extremely low ohmic resistance tend to pump up the current because
current decay during flyback approaches zero while at bridge turn on the current will
increase. This may lead to overcurrent detection. We suggest to use stepper motors
with an ohmic resistance of approximately 3 or more.
Partial shorts of windings or shorts of stepper motors with coils in series may still yield a
flyback pulses that are accepted by the diagnosis as a proper signal.
At stepping rates faster than 1ms/data transfer error flags indicating a short should be used
to initiate a pause of at least 1ms to allow the power bridges to cool down again.
5.13 Serial data interface (SPI)
The serial data interface itself consists of the pins SCL (serial clock), SDI (serial data input)
and SDO (serial data output).
To especially support bus controlled applications the additional signals
EN (chip enable not)
and CSN (chip select not) are available.
Table 8. Diagnosis description - bit7 and bit6
Error 1 bit7 Error 2 bit6 Description
H H Normal operation
L H
Short to VS (sink overload immediately after turn on) shorted load (no
flyback) open load (no flyback)
H L short to gnd (source overload, missing flyback is masked)
L L over temperature pre alarm
Functional description L9935
20/29 Doc ID 5198 Rev 10
5.13.1 Startup of the serial data interface
Falling slope of EN activates the device. After ten.sck the device is ready to work.
Falling slope of CSN indicates start of frame. Data transfer (reading SDI into the register)
takes place at the rising slopes of SCK.
Data transfer of the register to SDO takes place at the falling slope of SCK.
Rising slope of CSN indicates end of frame. At the end of frame data will only be accepted if
modulo 8 bit (modulo 8 falling slopes to SCK) have been transferred. If this is not the case
the input will be ignored and the bridges will maintain the same status as before.
SDO is a tristate output.
SDO is active while CSN = LOW, while CSN = HIGH SDO is high resistive.
Figure 9. SPI data/clock timing
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L9935 Functional description
Doc ID 5198 Rev 10 21/29
5.14 Test condition for all propagation times
Unless otherwise specified) HIGH 3 V; LOW 0.8 V; t
r
, t
f
= 10 ns;
Enable: ENN Low < 0.8 V, ENN High > V
CC
-0.8 V
Table of bits
bit5,bit4: current range of bridge A (Outputs A1 and A2)
bit3: polarity of bridge A
bit2,bit1: current range of bridge B (Outputs B1 and B2)
bit0: polarity of bridge B
bit7,bit6: Error1 and Error 2
Table 9. Test condition for all propagation times
Symbol Parameter Test conditions Min. Typ. Max. Unit
f
SCLK
SCK-Frequency - DC - 2MHz -
t
1
SCK stable before and after
CSN = 0
-100 --ns
t
ch
Width of SCK high pulse - 200 - - ns
t
cl
Width of SCK low pulse - 200 - - ns
t
su
SDI setup time - 80 - - ns
t
sh
SDI hold time - 80 - - ns
t
d
SDO delay time (C
L
= 50pF) - - 100 - ns
t
zc
SDO high Z CSN high - - 100 - ns
t
en_sck
Setup time ENABLE to SCK HIGH > V
CC
-1.2 V 30 - - s
t
pd
Propagation delay SPI to output
QXX
--2
(1)
- s
1. Measured at a transition from High impedance (Bridge off) to bridge on. (Reversing polarity takes about 1ms longer
because the bridge first turns off before turning on in reverse direction).

L9935

Mfr. #:
Manufacturer:
STMicroelectronics
Description:
Motor / Motion / Ignition Controllers & Drivers 2-Ph Stepper Motor
Lifecycle:
New from this manufacturer.
Delivery:
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