6
LTC1174
LTC1174-3.3/LTC1174-5
1174fe
(Pin 1 connection shown for LTC1174-3.3 and LTC1174-5, changes create LTC1174)
FU CTIO AL DIAGRA
U
U
W
–
+
V
TH2
–
+
–
+
V
LIM2
V
LIM1
I
PGM
R
SENSE
0.1Ω
RESET
V
TH1
LB
OUT
2
1174 BD
g
m
V
FB
1.25V
REFERENCE
Q
GND
4
5
SW
1
V
OUT
(V
FB
)
7
–
+
A1
×
R1*
31.5k
SET
6
V
IN
LB
IN
3
SHUTDOWN
8
C
T
SLEEP
–
+
A3
A4
A5
V
FB
* R1 = 51k FOR LTC1174-3.3
R1 = 93.5k FOR LTC1174-5
A2
SW (Pin 5): Drain of the P-Channel MOSFET Switch. Cathode
of Schottky diode must be closely connected to this pin.
V
IN
(Pin 6): Input Supply Voltage. It must be decoupled
close to ground Pin 4.
I
PGM
(Pin 7): Selects the Current Limit of the P-Channel
Switch. With I
PGM
= V
IN
, the current trip point is 600mA and
with I
PGM
= 0V, the current trip value is reduced to 340mA.
SHUTDOWN (Pin 8): Pulling this pin to ground keeps the
internal switch off and puts the LTC1174 in micropower
shutdown.
V
OUT
(V
FB
) (Pin 1): For the LTC1174, this pin connects to the
main voltage comparator’s input. On the LTC1174-3.3 and
LTC1174-5 this pin goes to an internal resistive divider
which sets the output voltage.
LB
OUT
(Pin 2): Open Drain of an N-Channel Pull-Down. This
pin will sink current when Pin 3 (LB
IN
) goes below 1.25V.
During shutdown the state of this pin is indeterminate.
LB
IN
(Pin 3): The “–” Input of the Low-Battery Voltage
Comparator. The “+” input is connected to a reference
voltage of 1.25V.
GND (Pin 4): Ground Pin.
UU
U
PI FU CTIO S
