9397 750 13811 © Koninklijke Philips Electronics N.V. 2004. All rights reserved.
Product data sheet Rev. 03 — 11 November 2004 10 of 20
Philips Semiconductors
74HC283
4-bit binary full adder with fast carry
t
THL
, t
TLH
output transition time see Figure 6
V
CC
= 2.0 V - 19 75 ns
V
CC
= 4.5 V - 7 15 ns
V
CC
= 6.0 V - 6 13 ns
C
PD
power dissipation capacitance V
I
= GND to V
CC
[1]
-88-pF
T
amb
= 40 °C to +85 °C
t
PHL
, t
PLH
propagation delay CIN to S1 see Figure 6
V
CC
= 2.0 V - - 200 ns
V
CC
= 4.5 V - - 40 ns
V
CC
= 6.0 V - - 34 ns
propagation delay CIN to S2 see
Figure 6
V
CC
= 2.0 V - - 225 ns
V
CC
= 4.5 V - - 45 ns
V
CC
= 6.0 V - - 38 ns
propagation delay CIN to S3 see
Figure 6
V
CC
= 2.0 V - - 245 ns
V
CC
= 4.5 V - - 49 ns
V
CC
= 6.0 V - - 42 ns
propagation delay CIN to S4 see
Figure 6
V
CC
= 2.0 V - - 290 ns
V
CC
= 4.5 V - - 58 ns
V
CC
= 6.0 V - - 49 ns
propagation delay An or Bn to Sn see
Figure 6
V
CC
= 2.0 V - - 265 ns
V
CC
= 4.5 V - - 53 ns
V
CC
= 6.0 V - - 45 ns
propagation delay CIN to COUT see
Figure 6
V
CC
= 2.0 V - - 245 ns
V
CC
= 4.5 V - - 49 ns
V
CC
= 6.0 V - - 42 ns
propagation delay An or Bn to
COUT
see
Figure 6
V
CC
= 2.0 V - - 245 ns
V
CC
= 4.5 V - - 49 ns
V
CC
= 6.0 V - - 42 ns
t
THL
, t
TLH
output transition time see Figure 6
V
CC
= 2.0 V - - 95 ns
V
CC
= 4.5 V - - 19 ns
V
CC
= 6.0 V - - 16 ns
Table 8: Dynamic characteristics
…continued
GND = 0 V; t
r
=t
f
= 6 ns; C
L
= 50 pF; see Figure 7.
Symbol Parameter Conditions Min Typ Max Unit
9397 750 13811 © Koninklijke Philips Electronics N.V. 2004. All rights reserved.
Product data sheet Rev. 03 — 11 November 2004 11 of 20
Philips Semiconductors
74HC283
4-bit binary full adder with fast carry
[1] C
PD
is used to determine the dynamic power dissipation (P
D
in µW).
P
D
=C
PD
× V
CC
2
× f
i
× N+(C
L
× V
CC
2
× f
o
) where:
f
i
= input frequency in MHz;
f
o
= output frequency in MHz;
C
L
= output load capacitance in pF;
V
CC
= supply voltage in V;
N = number of inputs switching;
(C
L
× V
CC
2
× f
o
) sum of outputs.
T
amb
= 40 °C to +125 °C
t
PHL
, t
PLH
propagation delay CIN to S1 see Figure 6
V
CC
= 2.0 V - - 240 ns
V
CC
= 4.5 V - - 48 ns
V
CC
= 6.0 V - - 41 ns
propagation delay CIN to S2 see
Figure 6
V
CC
= 2.0 V - - 270 ns
V
CC
= 4.5 V - - 54 ns
V
CC
= 6.0 V - - 46 ns
propagation delay CIN to S3 see
Figure 6
V
CC
= 2.0 V - - 295 ns
V
CC
= 4.5 V - - 59 ns
V
CC
= 6.0 V - - 50 ns
propagation delay CIN to S4 see
Figure 6
V
CC
= 2.0 V - - 345 ns
V
CC
= 4.5 V - - 69 ns
V
CC
= 6.0 V - - 59 ns
propagation delay An or Bn to Sn see
Figure 6
V
CC
= 2.0 V - - 315 ns
V
CC
= 4.5 V - - 63 ns
V
CC
= 6.0 V - - 54 ns
propagation delay CIN to COUT see
Figure 6
V
CC
= 2.0 V - - 295 ns
V
CC
= 4.5 V - - 59 ns
V
CC
= 6.0 V - - 50 ns
propagation delay An or Bn to
COUT
see
Figure 6
V
CC
= 2.0 V - - 295 ns
V
CC
= 4.5 V - - 59 ns
V
CC
= 6.0 V - - 50 ns
t
THL
, t
TLH
output transition time see Figure 6
V
CC
= 2.0 V - - 110 ns
V
CC
= 4.5 V - - 22 ns
V
CC
= 6.0 V - - 19 ns
Table 8: Dynamic characteristics
…continued
GND = 0 V; t
r
=t
f
= 6 ns; C
L
= 50 pF; see Figure 7.
Symbol Parameter Conditions Min Typ Max Unit
9397 750 13811 © Koninklijke Philips Electronics N.V. 2004. All rights reserved.
Product data sheet Rev. 03 — 11 November 2004 12 of 20
Philips Semiconductors
74HC283
4-bit binary full adder with fast carry
12. Waveforms
13. Application information
Figure 8 shows a 3-bit adder using the 74HC283. Trying the operand inputs of the fourth
adder (A4 and B4) LOW makes S4 dependent on, and equal to, the carry from the third
adder.
Figure 9, based on the same principle, shows a method of dividing the 74HC283 into a
2-bit and 1-bit adder. The third stage adder (A3, B3 and S3) is used simply as means of
transferring the carry into the fourth stage (via A3 and B3) and transferring the carry from
V
M
= 0.5 × V
I
.
Fig 6. Waveforms showing the inputs (CIN, An and Bn) to the outputs (Sn and COUT)
propagation delays and the output transition times
Test data is given in Table 9.
Definitions for test circuit:
R
T
= Termination resistance should be equal to output impedance Z
o
of the pulse generator.
C
L
= Load capacitance including jig and probe capacitance.
Fig 7. Load circuitry for switching times
Table 9: Test data
Supply Input Load
V
CC
V
I
t
r
, t
f
C
L
2.0 V V
CC
6 ns 50 pF
4.5 V V
CC
6 ns 50 pF
6.0 V V
CC
6 ns 50 pF
5.0 V V
CC
6 ns 15 pF
001aab899
CIN, An, Bn,
input
Sn, COUT,
output
V
M
t
PHL
t
THL
t
TLH
t
PLH
V
M
mna101
V
CC
V
I
V
O
R
T
C
L
PULSE
GENERATOR
D.U.T.

74HC283D,653

Mfr. #:
Manufacturer:
NXP Semiconductors
Description:
Logic Adder & Subtractor 4-BIT FULL ADDER
Lifecycle:
New from this manufacturer.
Delivery:
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