OMO ElectronicOMO Electronic
Expand menu
Hello, Sign inMy Account
0 Cart

74HC283N,652

P1-P3P4-P6P7-P9P10-P12P13-P15P16-P18P19-P20
1. General description
The 74HC283 is a high-speed Si-gate CMOS device and is pin compatible with low power
Schottky TTL (LSTTL). The 74HC283 is specified in compliance with JEDEC
standard no. 7A.
The 74HC283 adds two 4-bit binary words (An plus Bn) plus the incoming carry (CIN).
The binary sum appears on the sum outputs (S1 to S4) and the out-going carry (COUT)
according to the equation:
CIN + (A1 + B1) + 2(A2 + B2) + 4(A3 + B3) + 8(A4 + B4) =
= S1 + 2S2 + 4S3 + 8S4 + 16COUT
Where (+) = plus.
Due to the symmetry of the binary add function, the 74HC283 can be used with either all
active HIGH operands (positive logic) or all active LOW operands (negative logic). In case
of all active LOW operands the results S1 to S4 and COUT should be interpreted also as
active LOW. With active HIGH inputs, CIN must be held LOW when no carry in is
intended. Interchanging inputs of equal weight does not affect the operation, thus CIN, A1,
B1 can be assigned arbitrarily to pins 5, 6, 7, etc.
See the 74HC583 for the BCD version.
2. Features
■ High-speed 4-bit binary addition
■ Cascadable in 4-bit increments
■ Fast internal look-ahead carry
■ Low-power dissipation
■ Complies with JEDEC standard no. 7A
■ ESD protection:
◆ HBM EIA/JESD22-A114-B exceeds 2000 V
◆ MM EIA/JESD22-A115-A exceeds 200 V.
■ Multiple package options
■ Specified from −40 °Cto+80°C and from −40 °C to +125 °C.
74HC283
4-bit binary full adder with fast carry
Rev. 03 — 11 November 2004 Product data sheet
9397 750 13811 © Koninklijke Philips Electronics N.V. 2004. All rights reserved.
Product data sheet Rev. 03 — 11 November 2004 2 of 20
Philips Semiconductors
74HC283
4-bit binary full adder with fast carry
3. Quick reference data
[1] C
PD
is used to determine the dynamic power dissipation (P
D
in µW).
P
D
=C
PD
× V
CC
2
× f
i
× N+∑(C
L
× V
CC
2
× f
o
) where:
f
i
= input frequency in MHz;
f
o
= output frequency in MHz;
C
L
= output load capacitance in pF;
V
CC
= supply voltage in V;
N = number of inputs switching;
∑(C
L
× V
CC
2
× f
o
) = sum of outputs.
4. Ordering information
Table 1: Quick reference data
GND = 0 V; T
amb
=25
°
C; t
r
=t
f
= 6 ns.
Symbol Parameter Conditions Min Typ Max Unit
t
PHL
, t
PLH
propagation delay C
L
= 15 pF; V
CC
=5 V
CIN to S1 - 16 - ns
CIN to S2 - 18 - ns
CIN to S3 - 20 - ns
CIN to S4 - 23 - ns
An or Bn to Sn - 21 - ns
CIN to COUT - 20 - ns
An or Bn to COUT - 20 - ns
C
I
input capacitance - 3.5 - pF
C
PD
power dissipation
capacitance
V
I
= GND to V
CC
[1]
-88 -pF
Table 2: Ordering information
Type number Package
Temperature range Name Description Version
74HC283N −40 °C to +125 °C DIP16 plastic dual in-line package; 16 leads (300 mil) SOT38-4
74HC283D −40 °C to +125 °C SO16 plastic small outline package; 16 leads;
body width 3.9 mm
SOT109-1
74HC283DB −40 °C to +125 °C SSOP16 plastic shrink small outline package; 16 leads;
body width 5.3 mm
SOT338-1
74HC283PW −40 °C to +125 °C TSSOP16 plastic thin shrink small outline package;
16 leads; body width 4.4 mm
SOT403-1
9397 750 13811 © Koninklijke Philips Electronics N.V. 2004. All rights reserved.
Product data sheet Rev. 03 — 11 November 2004 3 of 20
Philips Semiconductors
74HC283
4-bit binary full adder with fast carry
5. Functional diagram
Fig 1. Functional diagram Fig 2. Logic symbol
Fig 3. IEC logic symbol
001aab897
CIN
A3
B3
A4
B4
S1
S2
S3
S4
A1
B1
A2
B2
14
15
12
11
4
1
13
10
5
6
3
2
9
7
COUT
001aab895
S4
S3
S2
S1
4
1
13
10
B4
A4
B3
15
A3
14
12
B2
A2
3
B1
6
2
A1
5
11
COUT
CIN
9
7
001aab896
0
3
10
13
1
4
COUT
9
0
14
3
12
3
P
Q
S
0
12
15
6
3
11
CIN
7
5
P1-P3P4-P6P7-P9P10-P12P13-P15P16-P18P19-P20

74HC283N,652

Mfr. #:
Buy 74HC283N,652
Manufacturer:
NXP Semiconductors
Description:
Logic Adder & Subtractor 4-BIT FULL ADDER
Lifecycle:
New from this manufacturer.
Delivery:
DHL FedEx Ups TNT EMS
Payment:
T/T Paypal Visa MoneyGram Western Union

Products related to this Datasheet