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MC74HC245ADTR2G

P1-P3P4-P6P7-P7
© Semiconductor Components Industries, LLC, 2014
November, 2014 − Rev. 16
1 Publication Order Number:
MC74HC245A/D
MC74HC245A
Octal 3-State Noninverting
Bus Transceiver
High−Performance Silicon−Gate CMOS
The MC74HC245A is identical in pinout to the LS245. The device
inputs are compatible with standard CMOS outputs; with pull−up
resistors, they are compatible with LSTTL outputs.
The HC245A is a 3−state noninverting transceiver that is used for
2−way asynchronous communication between data buses. The device
has an active−low Output Enable pin, which is used to place the I/O
ports into high−impedance states. The Direction control determines
whether data flows from A to B or from B to A.
Features
• Output Drive Capability: 15 LSTTL Loads
• Outputs Directly Interface to CMOS, NMOS, and TTL
• Operating Voltage Range: 2.0 to 6.0 V
• Low Input Current: 1 mA
• High Noise Immunity Characteristic of CMOS Devices
• In Compliance with the Requirements Defined by JEDEC Standard
No. 7 A
• Chip Complexity: 308 FETs or 77 Equivalent Gates
• NLV Prefix for Automotive and Other Applications Requiring
Unique Site and Control Change Requirements; AEC−Q100
Qualified and PPAP Capable
• These Devices are Pb−Free, Halogen Free and are RoHS Compliant
A
DATA
PORT
A8
A7
A6
A5
A3
A4
A2
A1
9
8
7
6
5
4
3
2
DIRECTION
OUTPUT
ENABLE
1
19
PIN 10 = GND
PIN 20 = V
CC
18
17
16
15
14
13
12
11
B1
B2
B3
B4
B5
B6
B7
B8
B
DATA
PORT
LOGIC DIAGRAM
http://onsemi.com
See detailed ordering and shipping information in the package
dimensions section on page 4 of this data sheet.
ORDERING INFORMATION
1
20
MARKING DIAGRAMS
SOIC−20
DW SUFFIX
CASE 751D
HC245A
AWLYYWWG
HC
245A
ALYWG
G
TSSOP−20
DT SUFFIX
CASE 948E
20
1
A = Assembly Location
WL, L = Wafer Lot
YY, Y = Year
WW, W = Work Week
G or G = Pb−Free Package
(Note: Microdot may be in either location)
SOIC−20 TSSOP−20
PIN ASSIGNMENT
A5
A3
A2
A1
DIRECTION
GND
A8
A7
A6
A4
5
4
3
2
1
10
9
8
7
6
14
15
16
17
18
19
20
11
12
13
B3
B2
B1
OUTPUT
ENABLE
V
CC
B8
B7
B6
B5
B4
MC74HC245A
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2
FUNCTION TABLE
Control Inputs
Operation
Output
Enable
Direction
L L Data Transmitted from Bus B to Bus A
L H Data Transmitted from Bus A to Bus B
H X Buses Isolated (High−Impedance State)
X = don’t care
MAXIMUM RATINGS (Note 1)
Symbol
Parameter Value Unit
V
CC
DC Supply Voltage −0.5 to +7.0 V
V
IN
DC Input Voltage −0.5 to V
CC
+ 0.5 V
V
OUT
DC Output Voltage (Note 2) −0.5 to V
CC
+ 0.5 V
I
IK
DC Input Diode Current ±20 mA
I
OK
DC Output Diode Current ±35 mA
I
OUT
DC Output Sink Current ±35 mA
I
CC
DC Supply Current per Supply Pin ±75 mA
I
GND
DC Ground Current per Ground Pin ±75 mA
T
STG
Storage Temperature Range −65 to +150
_C
T
L
Lead Temperature, 1 mm from Case for 10 Seconds 260
_C
T
J
Junction Temperature Under Bias +150
_C
q
JA
Thermal Resistance SOIC
TSSOP
96
128
_C/W
P
D
Power Dissipation in Still Air at 85_C SOIC
TSSOP
500
450
mW
MSL Moisture Sensitivity Level 1
F
R
Flammability Rating Oxygen Index: 30% to 35% UL 94 V−0 @ 0.125 in
V
ESD
ESD Withstand Voltage Human Body Model (Note 3)
Machine Model (Note 4)
Charged Device Model (Note 5)
u2000
u200
u1000
V
I
LATCHUP
Latchup Performance Above V
CC
and Below GND at 85_C (Note 6)
±300 mA
Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality
should not be assumed, damage may occur and reliability may be affected.
1. Measured with minimum pad spacing on an FR4 board, using 10 mm−by−1 inch, 20 ounce copper trace with no air flow.
2. I
O
absolute maximum rating must observed.
3. Tested to EIA/JESD22−A114−A.
4. Tested to EIA/JESD22−A115−A.
5. Tested to JESD22−C101−A.
6. Tested to EIA/JESD78.
RECOMMENDED OPERATING CONDITIONS
Symbol Parameter Min Max Unit
V
CC
DC Supply Voltage (Referenced to GND) 2.0 6.0 V
V
in
, V
out
DC Input Voltage, Output Voltage (Referenced to GND) 0 V
CC
V
T
A
Operating Temperature, All Package Types –55 +125
_C
t
r
, t
f
Input Rise and Fall Time V
CC
= 2.0 V
(Figure 1) V
CC
= 4.5 V
V
CC
= 6.0 V
0
0
0
1000
500
400
ns
Functional operation above the stresses listed in the Recommended Operating Ranges is not implied. Extended exposure to stresses beyond
the Recommended Operating Ranges limits may affect device reliability.
MC74HC245A
http://onsemi.com
3
DC ELECTRICAL CHARACTERISTICS (Voltages Referenced to GND)
Guaranteed Limit
Symbol Parameter Test Conditions
V
CC
V
–55 to
25_C
v 85_C v 125_C
Unit
V
IH
Minimum High−Level Input Voltage V
out
= V
CC
– 0.1 V
|I
out
| v 20 mA
2.0
3.0
4.5
6.0
1.5
2.1
3.15
4.2
1.5
2.1
3.15
4.2
1.5
2.1
3.15
4.2
V
V
IL
Maximum Low−Level Input Voltage V
out
= 0.1 V
|I
out
| v 20 mA
2.0
3.0
4.5
6.0
0.5
0.9
1.35
1.8
0.5
0.9
1.35
1.8
0.5
0.9
1.35
1.8
V
V
OH
Minimum High−Level Output
Voltage
V
in
= V
IH
|I
out
| v 20 mA
2.0
4.5
6.0
1.9
4.4
5.9
1.9
4.4
5.9
1.9
4.4
5.9
V
V
in
= V
IH
|I
out
| v 2.4 mA
|I
out
| v 6.0 mA
|I
out
| v 7.8 mA
3.0
4.5
6.0
2.48
3.98
5.48
2.34
3.84
5.34
2.2
3.7
5.2
V
OL
Maximum Low−Level Output
Voltage
V
in
= V
IL
|I
out
| v 20 mA
2.0
4.5
6.0
0.1
0.1
0.1
0.1
0.1
0.1
0.1
0.1
0.1
V
V
in
= V
IL
|I
out
| v 2.4 mA
|I
out
| v 6.0 mA
|I
out
| v 7.8 mA
3.0
4.5
6.0
0.26
0.26
0.26
0.33
0.33
0.33
0.4
0.4
0.4
I
in
Maximum Input Leakage Current V
in
= V
CC
or GND 6.0 ±0.1 ±1.0 ±1.0
mA
I
OZ
Maximum Three−State Leakage
Current
Output in High−Impedance State
V
in
= V
IL
or V
IH
V
out
= V
CC
or GND
6.0 ±0.5 ±5.0 ±10
mA
I
CC
Maximum Quiescent Supply Cur-
rent (per Package)
V
in
= V
CC
or GND
I
out
= 0 mA
6.0 4.0 40 160
mA
AC ELECTRICAL CHARACTERISTICS (C
L
= 50 pF, Input t
r
= t
f
= 6 ns)
Symbo
l
Parameter
V
CC
V
Guaranteed Limit
Unit
–55 to
25_C
v 85_C v 125_C
t
PLH
,
t
PHL
Maximum Propagation Delay,
A to B, B to A
(Figures 1 and 3)
2.0
3.0
4.5
6.0
75
55
15
13
95
70
19
16
110
80
22
19
ns
t
PLZ
,
t
PHZ
Maximum Propagation Delay,
Direction or Output Enable to A or B
(Figures 2 and 4)
2.0
3.0
4.5
6.0
110
90
22
19
140
110
28
24
165
130
33
28
ns
t
PZL
,
t
PZH
Maximum Propagation Delay,
Output Enable to A or B
(Figures 2 and 4)
2.0
3.0
4.5
6.0
110
90
22
19
140
110
28
24
165
130
33
28
ns
t
TLH
,
t
THL
Maximum Output Transition Time,
Any Output
(Figures 1 and 3)
2.0
3.0
4.5
6.0
60
23
12
10
75
27
15
13
90
32
18
15
ns
C
in
Maximum Input Capacitance (Pin 1 or Pin 19) − 10 10 10 pF
C
out
Maximum Three−State I/O Capacitance
(I/O in High−Impedance State)
− 15 15 15 pF
C
PD
Power Dissipation Capacitance (Per Transceiver Channel) (Note 7)
Typical @ 25°C, V
CC
= 5.0 V
pF
40
7. Used to determine the no−load dynamic power consumption: P
D
= C
PD
V
CC
2
f + I
CC
V
CC
.
P1-P3P4-P6P7-P7

MC74HC245ADTR2G

Mfr. #:
Buy MC74HC245ADTR2G
Manufacturer:
ON Semiconductor
Description:
Bus Transceivers 2-6V Octal 3-State Non-Inverting Bus
Lifecycle:
New from this manufacturer.
Delivery:
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