LTC5591
15
5591f
Figure 7. LO Input Return Loss
the mixer is switched between different operating states.
Figure 7 illustrates the LO port return loss for the different
operating modes.
applicaTions inForMaTion
return pin (IFGNDA), and a pin for adjusting the internal
bias (IFBA). The IF outputs must be biased at the sup-
ply voltage (V
CCIFA
), which is applied through matching
inductors L1A and L2A. Alternatively, the IF outputs can
be biased through the center tap of a transformer (T1A).
The common node of L1A and L2A can be connected to
the center tap of the transformer. Each IF output pin draws
approximately 50mA of DC supply current (100mA total).
An external load resistor, R2A, can be used to improve
impedance matching if desired.
IFGNDA (Pin 23) must be grounded or the amplifier will
not draw DC current. Inductor L3A may improve LO-IF
and RF-IF leakage performance in some applications, but
is otherwise not necessary. Inductors should have small
resistance for DC. High DC resistance in L3A will reduce
the IF amplifier supply current, which will degrade RF
performance.
Figure 8. IF Amplifier Schematic with Bandpass Match
4:1
T1A
IFA
C7A
L2AL1A
C5A
R2A
L3A (OR SHORT)
V
CCIFA
20212223
IF
AMP
BIAS
100mA
4mA
IFBA
V
CCA
LTC5591
IGNDA
IFA
–
IFA
+
R1A
(OPTION TO
REDUCE
DC POWER)
The nominal LO input level is 0dBm, though the limiting
amplifiers will deliver excellent performance over a ±6dBm
input power range. Table 2 lists the LO input impedance
and input reflection coefficient versus frequency.
Table 2. LO Input Impedance vs Frequency
(at Pin 16, No External Matching, ENA = ENB = High)
FREQUENCY
(GHz)
INPUT
IMPEDANCE
S11
MAG ANGLE
1.0 39.4 + j46.4 0.47 75.5
1.2 55.3 + j40.8 0.36 61.4
1.4 61.9 + j26.8 0.25 52.6
1.6 56.5 + j16.1 0.16 59.5
1.8 47.6 + j14.0 0.14 91.6
2.0 41.6 + j18.0 0.21 103.9
2.2 38.4 + j23.5 0.29 101.5
2.4 37.1 + j30.7 0.36 93.3
2.6 38.4 + j38.3 0.42 83.3
2.8 42.0 + j47.6 0.47 72.2
3.0 48.6 + j56.1 0.49 61.8
IF Outputs
The IF amplifiers in channels A and B are identical. The IF
amplifier for channel A, shown in Figure 8, has differen-
tial open collector outputs (IFA
+
and IFA
–
), a DC ground
LO FREQUENCY (GHz)
1
LO1 PORT RETURN LOSS (dB)
1.4
2
2.2 2.4 2.6 2.81.8
1.2 1.6
0.8
0
2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
BOTH CHANNELS ON
ONE
CHANNEL ON
BOTH CHANNELS OFF
For optimum single-ended performance, the differential
IF output must be combined through an external IF
transformer or a discrete IF balun circuit. The evaluation
board (see Figures 1 and 2) uses a 4:1 IF transformer for
impedance transformation and differential to single-ended
conversion. It is also possible to eliminate the IF transformer
and drive differential filters or amplifiers directly.