LTC3774
7
3774fc
For more information www.linear.com/LTC3774
TYPICAL PERFORMANCE CHARACTERISTICS
Prebiased Output at 0.5V
Quiescent Current vs Temperature Shutdown Current vs Temperature
FREQ Pin Source Current
vs Temperature
TEMPERATURE (°C)
–50
QUIESCENT CURRENT (mA)
25
3774 G18
9.75
–25 0
50 125
75 100 150
9.25
9.50
9.00
8.50
8.25
8.75
8.00
10.00
TEMPERATURE (°C)
–50
SHUTDOWN CURRENT (µA)
25
3774 G19
55
–25 0
50 125
75 100 150
45
50
40
30
25
35
20
60
TEMPERATURE (°C)
–50
FREQ PIN CURRENT (µA)
25
3774 G20
–25 0
50 125
75 100 150
21.0
20.5
19.5
19.0
20.0
18.5
21.5
50ms/DIV
3774 G08
V
OUT
500mV/DIV
TRACK/SS
500mV/DIV
LTC3774
8
3774fc
For more information www.linear.com/LTC3774
PIN FUNCTIONS
PGOOD1, PGOOD2 (Pin 15, Pin 14): Power Good Indica-
tor Outputs. Open drain outputs that pull to ground when
output voltage is not in regulation.
SNSA1
+
, SNSA2
+
(Pin 16, Pin 13): AC Current Sense
Comparator (+) Inputs. This input senses the signal from
the output inductors DCR with a filter bandwidth of five
times larger than the inductor’s L/DCR value.
SNS1
, SNS2
(Pin 17, Pin 12): Negative current Sense
Inputs. The negative input of the current comparator is
normally connected to the output.
SNSD1
+
, SNSD2
+
(Pin 18, Pin 11): DC Current Sense
Comparator (+) Inputs. This input senses the signal from
the output inductors DCR with a filter bandwidth equal to
the inductor’s L/DCR value.
RUN1, RUN2 (Pin 20, Pin 9): Run Control Inputs. A volt
-
age above 1.22V turns on the IC. There is a 1µA pull-up
current on this pin
.
Once the RUN pin rises above the
1.22V threshold the pull-up increases to 5µA.
PMW1, PWM2 (Pin 21, Pin 8): (Top) Gate Signal Outputs.
This signal goes to the PWM or top gate input of the ex
-
ternal gate driver or integrated driver MOSFET or Power
Block
. This is a three-state compatible output.
P
WMEN1, PWMEN2 (Pin 22, Pin 7): Enable pins for non-
three-state compatible drivers. This pin has an internal
open-drain pull-up to INTV
CC
. An external resistor to GND
is required. This pin is low when the corresponding PWM
pin is high impedance.
HIZB1, HIZB2 (Pin 23, Pin 6): Phase Shedding Input Pins.
When this pin is low, the corresponding PWM pin goes
high impedance and PWMEN goes low. Tie to INTV
CC
or
V
IN
to disable this function.
TK/SS1, TK/SS2 (Pin 24, Pin 5): Output Voltage Tracking
and Soft-Start Inputs. The voltage ramp rate at this pin
sets the voltage ramp rate of the output. A capacitor to
ground accomplishes soft-start. This pin has a 1.25µA
pull-up current.
V
OSNS1
+
, V
OSNS2
+
(Pin 25, Pin 4): Remote Sense Differ-
ential Amplifier Non-inverting Inputs. Connect to Feedback
divider center tap with the divider across the output load
.
The remote sense differential amplifiers output is internally
connected to the error amplifier inverting input.
V
OSNS1
, V
OSNS2
(Pin 26, Pin 3): Remote Sense Differ-
ential Amplifier Inverting inputs. Connect to sense ground
at the output load.
ITH1,
ITH2 (Pin 27, Pin 2): Current Control Thresholds
and Error Amplifier Compensation Points. The current
comparator’s threshold increases with the ITH control
voltage.
ITEMP1, ITEMP2 (Pin 28, Pin 1): Input of the temperature
sensing comparators. Connect this pin to an external NTC
resistor placed near the inductors. Floating this pin disables
the DCR temperature compensation function.
ILIM1, ILIM2 (Pin 29, Pin 36): Current Comparator Sense
Voltage Limit Selection pins.
PHSMD (Pin 30): Phase Mode Pin. This pin selects CH1-
CH2 and CH1-CLKOUT phase relationships.
FREQ (Pin 31): Frequency Set/Select Pin. A resistor
between this pin and GND sets the switching frequency.
This pin sources 20uA.
MODE/PLLIN (Pin 32): Dual Function Pin. Tying this pin
to GND, INTV
CC
or floating it enables forced continuous
mode, pulse-skipping mode or Burst Mode operation re-
spectively. Applying a clock signal to this pin causes the
internal PLL to synchronize the internal oscillator to the
clock signal and for
ces for
ced continuous mode
. The PLL
compensation network is integrated on to the IC.
CLKOUT
(Pin 33): Clock Output Pin. This pin is used to
synchronize other LTC3774s.
INTV
CC
(Pin 34): Internal 5.5V Regulator Output. The con-
trol circuits are powered from this voltage. Decouple this
pin to GND with a minimum of 4.7µF
low ESR tantalum
or ceramic capacitor. This pin is intended to be used as a
reference only. Please do not bias other applications off
this voltage!
V
IN
(Pin 35): Main Input Supply. Decouple this pin to GND
with a capacitor (0.1µF to 1µF)
GND (Pins 19, 10, Exposed Pad Pin 37): Ground. All
small-signal components and compensation components
should be connected here. The exposed pad must be
soldered to the PCB ground for electrical connection and
rated thermal performance.
LTC3774
9
3774fc
For more information www.linear.com/LTC3774
FUNCTIONAL BLOCK DIAGRAM
+
++
SLEEP
INTV
CC
0.55V
NOTE: FUNCTIONAL BLOCK DIAGRAM SHOWS 1 CHANNEL ONLY. THE 2 CHANNELS ARE IDENTICAL.
+
+
0.5V
SS
+
1.22V
RUN
1.25µA
V
IN
EA
ITH
R
C
C
C1
C
SS
RUN TK/SS
0.6V
REF
S
R
Q
PHSMD
5.5V
REG
ACTIVE CLAMP
OSC
MODE/SYNC
DETECT
SLOPE
COMPENSATION
UVLO
1
R
I
THB
1µA/5µA
FREQ
CLKOUT
MODE/PLLIN
ITEMP
0.6V
BURST EN
ILIM
+
+
I
CMP
I
REV
F
+
+
OV
UV
+
DIFFAMP
+
AMP
0.555V
PGOOD
SNS
SNSA
+
PWM
INTV
CC
V
OSNS
V
OSNS
+
SNSD
+
3774 BD
GND
0.645V
20k
20k
OV
RUN
ON
FCNT
PLL-SYNC
TEMPSNS
V
IN
SNS
1/2
PWMEN
SWITCH
LOGIC
HIZB
INTV
CC

LTC3774EUHE#PBF

Mfr. #:
Manufacturer:
Analog Devices / Linear Technology
Description:
Switching Voltage Regulators Dual, Multiphase Current Mode Synchronous Controller for Sub-Milliohm DCR Sensing
Lifecycle:
New from this manufacturer.
Delivery:
DHL FedEx Ups TNT EMS
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