Temperature
Conversion
Function
Select
HW_SHDN
H/W Thermal
Shutdown Sensor
Hardware Thermal Shutdown
SMBus
Traffic
SW_SHDN
3.3V
ALERT
SYS_SHDN
Software
Shutdown Enable
3.3V
Temperature
Conversion
and THERM
Limit
Compare
Internal Diode
Dual Channel 1°C Temperature Sensor with Hardware Thermal Shutdown and 1.8V SMBus Communications
Datasheet
SMSC EMC1186 19 Revision 1.0 (07-11-13)
DATASHEET
5.4 Hardware Thermal Shutdown Limit
The Hardware Thermal Shutdown Limit temperature is determined by pull-up resistors on the
SYS_SHDN and ALERT pins shown in Table 5.2.
Figure 5.2 Block Diagram of Hardware Thermal Shutdown
Table 5.2 SYS_SHDN Threshold Temperature
4.7K OHM
±10%
6.8K OHM
±10%
10K OHM
±10%
15K OHM
±10%
22K OHM
±10%
33K OHM
±10%
4.7K OHM ±10%
77°C 83°C 89°C 95°C 101°C 107°C
6.8K OHM ±10%
78°C 84°C 90°C 96°C 102°C 108°C
10K OHM ±10%
79°C 85°C 91°C 97°C 103°C 109°C
15K OHM ±10%
80°C 86°C 92°C 98°C 104°C 110°C
22K OHM ±10%
81°C 87°C 93°C 99°C 105°C 111°C
33K OHM ±10%
82°C 88°C 94°C 100°C 106°C 112°C
SYS_SHD
PULL-UP
PULL-UP
ALERT
Dual Channel 1°C Temperature Sensor with Hardware Thermal Shutdown and 1.8V SMBus Communications
Datasheet
Revision 1.0 (07-11-13) 20 SMSC EMC1186
DATASHEET
5.5 ALERT Output
The ALERT pin is an open drain output and requires a pull-up resistor to V
DD
and has two modes of
operation: interrupt mode and comparator mode. The mode of the
ALERT output is selected via the
ALERT / COMP bit in the Configuration Register (see Section 6.3).
5.5.1 ALERT Pin Interrupt Mode
When configured to operate in interrupt mode, the ALERT pin asserts low when an out of limit
measurement (> high limit or < low limit) is detected on any diode or when a diode fault is detected,
functioning as any standard
ALERT in on the SMBus. The ALERT pin will remain asserted as long
as an out-of-limit condition remains. Once the out-of-limit condition has been removed, the ALERT pin
will remain asserted until the appropriate status bits are cleared.
The ALERT pin can be masked by setting the MASK_ALL bit. Once the ALERT pin has been masked,
it will be de-asserted and remain de-asserted until the MASK_ALL bit is cleared by the user. Any
interrupt conditions that occur while the
ALERT pin is masked will update the Status Register normally.
There are also individual channel masks (see Section 6.10).
The ALERT pin is used as an interrupt signal or as an SMBus Alert signal that allows an SMBus slave
to communicate an error condition to the master. One or more
ALERT outputs can be hard-wired
together.
5.5.2 ALERT Pin Comparator Mode
When the ALERT pin is configured to operate in comparator mode, it will be asserted if any of the
measured temperatures exceeds the respective high limit. The ALERT pin will remain asserted until
all temperatures drop below the corresponding high limit minus the Therm Hysteresis value.
When the ALERT pin is asserted in comparator mode, the corresponding high limit status bits will be
set. Reading these bits will not clear them until the
ALERT pin is deasserted. Once the ALERT pin is
deasserted, the status bits will be automatically cleared.
The MASK_ALL bit will not block the ALERT pin in this mode; however, the individual channel masks
(see Section 6.10) will prevent the respective channel from asserting the ALERT pin.
5.6 ALERT and SYS_SHDN Pin Considerations
Because of the decode method used to determine the Hardware Thermal Shutdown Limit, it is
important that the pull-up resistance on both the
ALERT and SYS_SHDN pins be within the tolerances
shown in
Table 5.2. Additionally, the pull-up resistor on the ALERT and SYS_SHDN pins must be
connected to the same 3.3V supply that drives the VDD pin.
For 15ms after power up, the ALERT and SYS_SHDN pins must not be pulled low or the Hardware
Thermal Shutdown Limit will not be decoded properly. If the system requirements do not permit these
conditions, the
ALERT and SYS_SHDN pins must be isolated from their respective busses during this
time.
One method of isolating the ALERT pin is shown in Figure 5.3.
Dual Channel 1°C Temperature Sensor with Hardware Thermal Shutdown and 1.8V SMBus Communications
Datasheet
SMSC EMC1186 21 Revision 1.0 (07-11-13)
DATASHEET
5.7 Temperature Measurement
The EMC1186 can monitor the temperature of one externally connected diodes.
The device contains programmable High, Low, and Therm limits for all measured temperature
channels. If the measured temperature goes below the Low limit or above the High limit, the
ALERT
pin can be asserted (based on user settings).
5.7.1 Beta Compensation
The EMC1186 is configured to monitor the temperature of basic diodes (e.g., 2N3904) or CPU thermal
diodes. For External Diode 1, it automatically detects the type of external diode (CPU diode or diode
connected transistor) and determines the optimal setting to reduce temperature errors introduced by
beta variation. Compensating for this error is also known as implementing the transistor or BJT model
for temperature measurement.
For discrete transistors configured with the collector and base shorted together, the beta is generally
sufficiently high such that the percent change in beta variation is very small. For example, a 10%
variation in beta for two forced emitter currents with a transistor whose ideal beta is 50 would contribute
approximately 0.25°C error at 100°C. However for substrate transistors where the base-emitter junction
is used for temperature measurement and the collector is tied to the substrate, the proportional beta
variation will cause large error. For example, a 10% variation in beta for two forced emitter currents
with a transistor whose ideal beta is 0.5 would contribute approximately 8.25°C error at 100°C.
5.7.2 Resistance Error Correction (REC)
Parasitic resistance in series with the external diodes will limit the accuracy obtainable from
temperature measurement devices. The voltage developed across this resistance by the switching
diode currents cause the temperature measurement to read higher than the true temperature.
Contributors to series resistance are PCB trace resistance, on die (i.e. on the processor) metal
resistance, bulk resistance in the base and emitter of the temperature transistor. Typically, the error
caused by series resistance is +0.7°C per ohm. The EMC1186 automatically corrects up to 100 ohms
of series resistance.
Figure 5.3 Isolating ALERT and SYS_SHDN Pin
EMC1186
8
7
SMDATA
SMCLK
1
2
3
4
ALERT
VDD
DP
DN
SYS_SHDN
GND
+3.3V
22K
4.7K -
33K
+2.5 - 5V
5
+3.3V
22K
4.7K -
33K
+2.5 - 5V
Shared SYS_SHDN
Shared Alert
6

EMC1186-2-AC3-TR

Mfr. #:
Manufacturer:
Microchip Technology
Description:
Board Mount Temperature Sensors 1.8V SMBus Dual Temp Sensor
Lifecycle:
New from this manufacturer.
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