LTC4265
7
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OVERVIEW
Power over Ethernet (PoE) continues to gain popularity
as more products are taking advantage of having DC
power and high speed data available from a single RJ45
connector. As PoE continues to grow in the marketplace,
Powered Device (PD) equipment vendors are running into
the 12.95W power limit established by the IEEE 802.3af
standard.
The IEE802.3at standard establishes a higher power
allocation for Power-over-Ethernet while maintaining
backwards compatibility with the existing IEEE802.3af
systems. Power Sourcing Equipments (PSE) and Powered
Devices are distinguished as Type-1 complying with the
IEEE 802.3af power levels, or Type-2 complying with the
IEEE 802.3at power levels. The maximum available power
of a Type-2 PD is 25.5W.
The IEEE802.3at standard also establishes a new method
of acquiring power classification from a PD and communi
-
cating the presence of a Type-2 PSE. A Type-2 PSE has the
option of acquiring PD power classification by performing
2-event classification (Layer 1) or by communicating with
the PD over the data line (Layer 2). In turn, a Type-2 PD
must be able to recognize both layers of communications
and identify a Type-2 PSE.
The LTC4265 is specifically designed to support the front
end of a PD that must operate under the IEEE802.3at
standard. In particular, the LTC4265 provides the T2PSE
indicator bit which recognizes 2-event classification. This
indicator bit may be used to alert the LTC4265 output load
that a Type-2 PSE is present. With an internal signature
resistor, classification circuitry, inrush control, and ther
-
mal shutdown, the LTC4265 is a complete PD Interface
solution capable of supporting in the next generation PD
applications.
M
ODES OF OPERATION
The LTC4265 has several modes of operation depending on
the input voltage applied between the GND and V
IN
pins.
Figure 1 presents an illustration of voltage and current
waveforms the LTC4265 may encounter with the various
modes of operation summarized in Table 1.
DETECTION V1
CLASSIFICATION
ON
UVLO
UVLO
POWER
BAD
UVLOON
τ = R
LOAD
C1
PWRGD TRACKS
V
IN
DETECTION V2
50
TIME
40
30
GND – V
IN
(V)
20
10
50
40
30
20
10
TIME
GND – V
OUT
(V)
–10
TIME
–20
–30
GND – PWRGD (V)PWRGD – V
OUT
(V)
–40
–50
20
10
PD CURRENT
INRUSH
dV
dt
INRUSH
C1
=
POWER
BAD
PWRGD
TRACKS
GND
PWRGD
TRACKS
GND
POWER
BAD
POWER
BAD
TIME
TIME
POWER
GOOD
POWER
GOOD
DETECTION I
1
CLASSIFICATION
DETECTION I
2
LOAD, I
LOAD
4265 F01
I
CLASS
DEPENDENT ON R
CLASS
SELECTION
INRUSH = 100mA
I
1
=
V1 – 2 DIODE DROPS
25kΩ
I
LOAD
=
V
IN
R
LOAD
I
2
=
V2 – 2 DIODE DROPS
25kΩ
GND
PSE
I
IN
R
LOAD
R
CLASS
V
OUT
C1
GND
R
CLASS
PWRGD
PWRGD
LTC4265
V
OUT
V
IN
IN DETECTION
RANGE
Figure 1. Output Voltage, PWRGD, PWRGD and
PD Current as a Function of Input Voltage
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These modes satisfy the requirements defined in the IEEE
802.3af/at specification.
Table 1. LTC4265 Modes of Operation as a Function
of Input Voltage
GND (V) LTC4265 MODES OF OPERATION
0V to 1.4V Inactive (Reset After 1st Classification Event)
1.5V to 9.8V
(5.4V to 9.8V)
25k Signature Resistor Detection Before 1st
Classification Event (Mark, 11k Signature
Corrupt After 1st Classification Event)
12.5V to ON/UVLO* Classification Load Current Active
ON/UVLO* to 60V Inrush and Power Applied T
o PD Load
>71V Over
voltage Lockout, 4265 Operations are Disabled
*ON/UVLO includes hysteresis. Rising input threshold, 37.2V Max.
Falling input threshold, 30V Min.
INPUT DIODE BRIDGE
In the IEEE 802.3af/at standard, the modes of operation
reference the input voltage at the PD’s RJ45 connector.
Since the PD must handle power received in either polarity
from either the data or the spare pair, input diode bridges
BR1 and BR2 are connected between the RJ45 connector
and the LTC4265 (Figure 2).
RX
6
RX
+
3
TX
2
TX
+
RJ45
T1
POWERED
DEVICE (PD)
INPUT
4265 F02
1
7
8
5
4
SPARE
SPARE
+
TO PHY
BR2
0.1µF
100V
BR1
GND
D3
LTC4265
V
IN
Figure 2. PD Front End Using Diode Bridges on Main and Spare Inputs
The input diode bridge introduces a voltage drop that
affects the range for each mode of operation. The LTC4265
compensates for these voltage drops so that a PD built with
the LTC4265 meets the IEEE 802.3af/at-established voltage
ranges. Note that the Electrical Specifications reference
with respect to the LTC4265 package pins.
DETECTION
During detection, the PSE looks for a 25k signature resistor
which identifies the device as a PD. The PSE will apply
two voltages in the range of 2.8V to 10V and measures
the corresponding currents. Figure 1 shows the detection
voltages V1 and V2 and the corresponding PD current.
The PSE calculates the signature resistance using the ΔV/
ΔI measurement technique.
The LTC4265 presents its precision, temperature-compen
-
sated 25k resistor between the GND
and V
IN
pins, alerting
the PSE that a PD is present and requests power to be
applied. The LTC4265 signature resistor also compensates
for the additional series resistance introduced by the input
diode bridge. Thus a PD built with the LTC4265 conforms
to the IEEE 802.3af/at detection specifications.
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SIGNATURE CORRUPT OPTION
In some designs that include an auxiliary power option,
it is necessary to prevent a PD from being detected by a
PSE. The LTC4265 signature resistance can be corrupted
with the SHDN pin (Figure 3). Taking the SHDN pin high
will reduce the signature resistor below 11k which is an
invalid signature per the IEEE 802.3af/at specification, and
alerts the PSE not to apply power. Invoking the SHDN pin
also ceases operation for classification and disconnects
the LTC4265 load from the PD input. If this feature is not
used, connect SHDN to V
IN
.
During classification probing, the PSE presents a fixed
voltage between 15.5V and 20.5V to the PD (Figure 2).
The LTC4265 asserts a load current representing the PD
power classification. The classification load current is
programmed with a resistor R
CLASS
that is chosen from
Table 2.
Table 2. Summary of Power Classifications and LTC4265
R
CLASS
Resistor Selection
CLASS USAGE MAXIMUM
AVERAGE POWER
LEVELS AT INPUT
OF PD (W)
NOMINAL
CLASSIFICATION
LOAD CURRENT
(mA)
LTC4265
R
CLASS
RESISTOR
(Ω, 1%)
0 Default 0.44 to 13.0 < 0.4 Open
1 Optional 0.44 to 3.84 10.5 124
2 Optional 3.84 to 6.49 18.5 69.8
3 Optional 6.49 to 13.0 28 45.3
4 Optional 13.0 to 25.5 40 30.9
2-EVENT CLASSIFICATION AND THE T2PSE PIN
A Type-2 PSE may declare the availability of high power by
performing 2-event classification (Layer 1) or by commu
-
nicating over the high speed data line (Layer 2). A Type-2
PD must recognize both layers of communication. Since
Layer 2 communications takes place directly between the
PSE and the LTC4265 load, the LTC4265 concerns itself
only with recognizing 2-event classification.
Figure 3. 25k Signature Resistor with Disable
GND
V
IN
SHDN
LTC4265
TO AUX
4265 F03
25k SIGNATURE
RESISTOR
14k
TO
PSE
CLASSIFICATION
Classification provides a method for more efficient power
allocation by allowing the PSE to identify a PD power clas
-
sification. Class 0 is included in the IEEE specification for
PDs that don’t support classification. Class 1-3 partitions
PDs into 3 distinct power ranges. Class 4 includes the new
power range under IEEE802.3at (See Table 2).

LTC4265CDE#TRPBF

Mfr. #:
Manufacturer:
Analog Devices Inc.
Description:
Power Switch ICs - POE / LAN IEEE 802.3 at Hi Pwr PD Int Cntr w/ 2-Ev
Lifecycle:
New from this manufacturer.
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