2003 May 14 10
Philips Semiconductors Product specification
2.5 V/3.3 V 16-bit buffer/line driver
(3-state)
74ALVC16244;
74ALVCH16244
AC CHARACTERISTICS
GND = 0 V; t
r
=t
f
2.0 ns and C
L
= 30 pF for V
CC
< 2.7 V; t
r
=t
f
2.5 ns and C
L
= 50 pF for V
CC
2.7 V.
Note
1. All typical values are measured at T
amb
=25°C.
Typical values for V
CC
= 2.3 to 2.7 V are measured at V
CC
= 2.5 V.
Typical values for V
CC
= 3.3 to 3.6 V are measured at V
CC
= 3.3 V.
AC WAVEFORMS
SYMBOL PARAMETER
TEST CONDITIONS
MIN. TYP. MAX. UNIT
WAVEFORMS V
CC
(V)
T
amb
= 40 to +85 °C; note 1
t
PHL
/t
PLH
propagation
delay nAn to nYn
see Figs 5 and 7 1.2 5.8 ns
1.8 1.5 2.8 5.1 ns
2.3 to 2.7 1.0 1.9 3.7 ns
2.7 1.0 2.1 3.6 ns
3.0 to 3.6 1.0 1.9 3.0 ns
t
PZH
/t
PZL
3-state output
enable time
nOE to nYn
see Figs 6 and 7 1.2 8.4 ns
1.8 1.5 3.8 7.1 ns
2.3 to 2.7 1.0 2.5 4.9 ns
2.7 1.0 2.9 4.9 ns
3.0 to 3.6 1.0 2.3 4.0 ns
t
PHZ
/t
PLZ
3-state output
disable time
nOE to nYn
see Figs 6 and 7 1.2 5.9 ns
1.8 1.5 3.1 5.4 ns
2.3 to 2.7 1.0 2.1 4.1 ns
2.7 1.0 3.0 4.5 ns
3.0 to 3.6 1.0 2.7 4.1 ns
handbook, halfpage
MNB013
nAn input
nYn output
t
PHL
t
PLH
GND
V
I
V
M
V
M
V
OH
V
OL
Fig.5 Input (nAn) to output (nYn) propagation delays.
V
M
= 0.5V
CC
at V
CC
< 2.7 V and V
M
= 1.5 V at V
CC
2.7 V.
V
OL
and V
OH
are the typical output voltage drop that occur with the output load.
2003 May 14 11
Philips Semiconductors Product specification
2.5 V/3.3 V 16-bit buffer/line driver
(3-state)
74ALVC16244;
74ALVCH16244
handbook, full pagewidth
MNA999
t
PLZ
t
PHZ
outputs
disabled
outputs
enabled
V
Y
V
X
outputs
enabled
output
LOW-to-OFF
OFF-to-LOW
output
HIGH-to-OFF
OFF-to-HIGH
nOE input
V
OL
V
OH
V
CC
V
I
V
M
GND
GND
t
PZL
t
PZH
V
M
V
M
Fig.6 3-state enable and disable times.
V
M
= 0.5V
CC
at V
CC
< 2.7 V and V
M
= 1.5 V at V
CC
2.7 V.
V
X
=V
OL
+ 0.15 V at V
CC
< 2.7 V and V
X
=V
OL
+ 0.3 V at V
CC
2.7 V.
V
Y
=V
OH
0.15 V at V
CC
< 2.7 V and V
Y
=V
OH
0.3 V at V
CC
2.7 V.
V
OL
and V
OH
are the typical output voltage drop that occur with the output load.
handbook, full pagewidth
open
GND
2 × V
CC
V
CC
V
I
V
O
MNA755
D.U.T.
C
L
R
T
R
L
500
R
L
500
PULSE
GENERATOR
S1
Fig.7 Load circuitry for switching times.
TEST S1
t
PLH
/t
PHL
open
t
PLZ
/t
PZL
2 × V
CC
t
PHZ
/t
PZH
GND
V
CC
V
I
<2.7 V V
CC
2.7 to 3.6 V 2.7 V
Definitions for test circuit:
R
L
= Load resistor.
C
L
= Load capacitance including jig and probe capacitance.
R
T
= Termination resistance should be equal to Z
o
of the pulse generator.
2003 May 14 12
Philips Semiconductors Product specification
2.5 V/3.3 V 16-bit buffer/line driver
(3-state)
74ALVC16244;
74ALVCH16244
PACKAGE OUTLINES
UNIT A
1
A
2
A
3
b
p
cD
(1)
E
(1)
eH
E
LL
p
QZywv θ
REFERENCES
OUTLINE
VERSION
EUROPEAN
PROJECTION
ISSUE DATE
IEC JEDEC JEITA
mm
0.4
0.2
2.35
2.20
0.25
0.3
0.2
0.22
0.13
16.00
15.75
7.6
7.4
0.635 1.4 0.25
10.4
10.1
1.0
0.6
1.2
1.0
0.85
0.40
8
0
o
o
0.18 0.1
DIMENSIONS (mm are the original dimensions)
Note
1. Plastic or metal protrusions of 0.25 mm maximum per side are not included.
SOT370-1
99-12-27
03-02-19
(1)
w M
b
p
D
H
E
E
Z
e
c
v M
A
X
A
y
48
25
MO-118
24
1
θ
A
A
1
A
2
L
p
Q
detail X
L
(A )
3
pin 1 index
0 5 10 mm
scale
SSOP48: plastic shrink small outline package; 48 leads; body width 7.5 mm
SOT370-1
A
max.
2.8

74ALVC16244DGG,512

Mfr. #:
Manufacturer:
Nexperia
Description:
IC BUF NON-INVERT 3.6V 48TSSOP
Lifecycle:
New from this manufacturer.
Delivery:
DHL FedEx Ups TNT EMS
Payment:
T/T Paypal Visa MoneyGram Western Union

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