DM74ALS874BWM

© 2001 Fairchild Semiconductor Corporation DS006244 www.fairchildsemi.com
April 1984
Revised July 2001
DM74ALS874B Dual 4-Bit D-Type Edge-Triggered Flip-Flop with 3-STATE Outputs
DM74ALS874B
Dual 4-Bit D-Type Edge-Triggered Flip-Flop
with 3-STATE Outputs
General Description
This dual 4-bit register features totem-pole 3-STATE out-
puts designed specifically for driving highly-capacitive or
relatively low-impedance loads. The high-impedance state
and increased high-logic-level drive provide this register
with the capability of being connected directly to and driv-
ing the bus lines in a bus-organized system without need
for interface or pull-up components. It is particularly attrac-
tive for implementing buffer registers, I/O ports, bidirec-
tional bus drivers, and working registers.
The eight flip-flops of the DM74ALS874B are edge-trig-
gered D-type flip-flops. On the positive transition of the
clock, the Q outputs will be set to the logic states that were
set up at the D inputs.
A buffered output control input can be used to place the
eight outputs in either a normal logic state (HIGH or LOW
logic levels) or a high-impedance state. In the high-imped-
ance state the outputs neither load nor drive the bus lines
significantly.
The output control does not affect the internal operation of
the flip-flops. That is, the old data can be retained or new
data can be entered even while the outputs are OFF.
Features
Switching specifications at 50 pF
Switching specifications guaranteed over full tempera-
ture and V
CC
range
Advanced oxide-isolated, ion-implanted Schottky TTL
process
3-STATE buffer-type outputs drive bus lines directly
Space saving 300 mil wide package
Asynchronous clear
Ordering Code:
Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.
Connection Diagram
Order Number Package Number Package Description
DM74ALS874BWM M24B 24-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300" Wide
DM74ALS874BNT N24C 24-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300" Wide
www.fairchildsemi.com 2
DM74ALS874B
Function Table
L = LOW State
H = HIGH State
X = Don’t Care
= Positive Edge Transition
Z = High Impedance State
Q
0
= Previous Condition of Q
Logic Diagram
Inputs Output
CLR
DCLKOC Q
XXXHZ
LXXLL
HH
LH
HL
LL
HXLLQ
0
3 www.fairchildsemi.com
DM74ALS874B
Absolute Maximum Ratings(Note 1)
Note 1: The Absolute Maximum Ratings are those values beyond which
the safety of the device cannot be guaranteed. The device should not be
operated at these limits. The parametric values defined in the Electrical
Characteristics tables are not guaranteed at the absolute maximum ratings.
The Recommended Operating Conditions table will define the conditions
for actual device operation.
Recommended Operating Conditions
Note 2: The () arrow indicates the positive edge of the Clock is used for reference.
Supply Voltage 7V
Input Voltage 7V
Voltage Applied to Disabled Output 5.5V
Operating Free Air Temperature Range 0
°C to +70°C
Storage Temperature Range
65°C to +150°C
Typical
θ
JA
N Package 51.0°C/W
M Package 86.5
°C/W
Symbol Parameter Min Nom Max Units
V
CC
Supply Voltage 4.5 5 5.5 V
V
IH
HIGH Level Input Voltage 2 V
V
IL
LOW Level Input Voltage 0.8 V
I
OH
HIGH Level Output Current 2.6 mA
I
OL
LOW Level Output Current 24 mA
f
CLK
Clock Frequency 0 30 MHz
t
WCLK
Width of Clock Pulse HIGH 16.5 ns
LOW 16.5 ns
t
WCLR
Width of Clear Pulse LOW 10 ns
t
SU
Data Setup Time (Note 2) 15 ns
t
H
Data Hold Time (Note 2) 0 ns
t
SU
Clear Inactive 12 ns
T
A
Free Air Operating Temperature 0 70 °C

DM74ALS874BWM

Mfr. #:
Manufacturer:
ON Semiconductor / Fairchild
Description:
Flip Flops Dl 4-Bit D Flip-Flop
Lifecycle:
New from this manufacturer.
Delivery:
DHL FedEx Ups TNT EMS
Payment:
T/T Paypal Visa MoneyGram Western Union

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