© 2001 Fairchild Semiconductor Corporation DS500507 www.fairchildsemi.com
July 2001
Revised July 2001
FIN1031 3.3V LVDS 4-Bit High Speed Differential Driver
FIN1031
3.3V LVDS 4-Bit High Speed Differential Driver
General Description
This quad driver is designed for high speed interconnects
utilizing Low Voltage Differential Signaling (LVDS) technol-
ogy. The driver translates LVTTL signal levels to LVDS lev-
els with a typical differential output swing of 350mV which
provides low EMI at ultra low power dissipation even at
high frequencies. This device is ideal for high speed trans-
fer of clock and data.
The FIN1031 can be paired with its companion receiver,
the FIN1032, or any other Fairchild LVDS receiver.
Features
■ Greater than 400Mbs data rate
■ 3.3V power supply operation
■ 0.4ns maximum differential pulse skew
■ 2.0ns maximum propagation delay
■ Low power dissipation
■ Power OFF protection
■ Meets or exceeds the TIA/EIA-644 LVDS standard
■ Pin compatible with equivalent RS-422 and LVPECL
devices
■ 16-Lead SOIC and TSSOP packages save space
Ordering Code:
Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.
Function Table
H = HIGH Logic Level L = LOW Logic Level
X = Don’t Care Z = High Impedance
Connection Diagram
Pin Descriptions
Order Number Package Number Package Description
FIN1031M M16A 16-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150" Narrow
FIN1031MTC MTC16 16-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide
Inputs Outputs
EN EN
D
IN
D
OUT+
D
OUT−
HXHHL
HXLLH
HXOPENLH
XLHHL
XLLLH
XLOPENLH
LHXZZ
Pin Name Description
D
IN1
, D
IN2
, D
IN3
, D
IN4
LVTTL Data Inputs
D
OUT1+
, D
OUT2+
, D
OUT3+
, D
OUT4+
Non-Inverting Driver Outputs
D
OUT1−
, D
OUT2−
, D
OUT3−
, D
OUT4−
Inverting Driver Outputs
EN Driver Enable Pin
EN
Inverting Driver Enable Pin
V
CC
Power Supply
GND Ground