LTC2909IDDB-3.3#TRPBF

LTC2909
7
2909fb
BLOCK DIAGRA
W
+
+
+
ADJUSTABLE
PULSE
GENERATOR
THREE-STATE
DECODE
THREE-STATE
DECODE
TMR
RST
GND
2909 BD
200ms
PULSE
GENERATOR
+
SEL
CONTROL 1CONTROL 2
ADJ1
ADJ2
REF
V
CC
V
CC
6.5V
+
V
CC
500mV
+
1.000V
SEL
GND
OPEN
V
CC
CONTROL 1
H
L
L
CONTROL 2
H
H
L
TI I G DIAGRA S
WWU
V
ADJ
t
PROP
1V
1V
1V
V
RT
V
RT
V
CC(UVLO)
t
RST
RST
Normal Positive Polarity Input Timing
V
ADJ
t
PROP
1V
V
RT
t
PROP
V
RT
RST
Comparator Mode Positive Polarity Input Timing
V
CC
t
UV
1V
V
CC(UVLO)
t
UV
V
CC(UVLO)
RST
Comparator Mode UVLO Timing
V
ADJ
t
PROP
1V
V
RT
t
PROP
V
RT
RST
Comparator Mode Negative Polarity Input Timing
V
ADJ
t
PROP
t
RST
RST
Normal Negative Polarity Input Timing
V
CC
t
UV
2909 TD
t
RST
RST
Normal UVLO Timing
LTC2909
8
2909fb
APPLICATIO S I FOR ATIO
WUU
U
The LTC2909 is a low power, high accuracy dual/triple
supply monitor with two adjustable inputs and an ac-
curate UVLO. Reset timeout may be selected with an
external capacitor, set to an internally generated 200ms,
or disabled entirely.
The three-state polarity select pin (SEL) chooses one of
three possible polarity combinations for the adjustable input
thresholds, as described in Table 1. Both input voltages
(V
ADJ1
and V
ADJ2
) must be valid (above threshold if con-
gured for positive polarity, below threshold if confi gured
for negative polarity), and V
CC
above the UVLO threshold
for the reset timeout before
R
S
T is released. The LTC2909
asserts the reset output during power-up, power-down and
brownout conditions on any of the voltage inputs.
Power-Up
The LTC2909 uses proprietary low voltage drive circuitry
for the
R
S
T pin which holds
R
S
T low with as little as
200mV of V
CC
. This helps prevent an unknown voltage
on the
R
S
T line during power-up.
In applications where the low voltage pull-down capabil-
ity is important, the supply to which the external pull-up
resistor connects should be the same supply which powers
the part. Using the same supply for both ensures that
R
S
T
never fl oats above 200mV during power-up, as the pull-
down ability of the pin will then increase as the required
pull-down current to maintain a logic low increases.
Once V
CC
passes the UVLO threshold, polarity selection
and timer initialization will occur. If the monitored supplies
(ADJ1 and ADJ2) are valid, the appropriate timeout delay
will begin, after which
R
S
T will be released. Otherwise, the
part will wait until all supplies are valid (including V
CC
above
the UVLO threshold) before beginning the timeout.
Power-Down
On power-down, once V
CC
drops below the UVLO threshold
or either V
ADJ
becomes invalid,
R
S
T asserts logic low. V
CC
of at least 0.5V guarantees a logic low of 0.15V at
R
S
T.
Shunt Regulator
The LTC2909 contains an internal 6.5V shunt regulator on
the V
CC
pin to allow operation from a high voltage supply. To
operate the part from a supply higher than 6V, the V
CC
pin
must have a series resistor, R
CC
, to the supply. This resistor
should be sized according to the following equation:
VV
mA
R
VV
µA I
SMAX
CC
SMIN
VRE
() ()
–. –.62
10
68
200
≤≤
+
FF
where V
S(MIN)
and V
S(MAX)
are the operating minimum and
maximum of the supply, and I
VREF
is the maximum current
the user expects to draw from the reference output.
As an example, consider operation from an automobile bat-
tery which might dip as low as 10V or spike to 60V. Assume
that the user will be drawing 100A from the reference. We
must then pick a resistance between 5.4k and 10.7k.
When the V
CC
pin is connected to a low impedance supply,
it is important that the supply voltage never exceed 6V,
or the shunt regulator may begin to draw large currents.
Some supplies may have nominal value suffi ciently close
to the shunt regulation voltage to prevent sizing of the
resistor according to the above equation. For such sup-
plies, a 470Ω series resistor may be used.
Polarity Selection
The external connection of the SEL pin selects the polarities
of the LTC2909 adjustable inputs. SEL may be connected to
GND, connected to V
CC
or left unconnected during normal
operation. When left unconnected, the maximum leakage
allowable from the pin to either GND or V
CC
is 10A. Table 1
shows the three possible selections of polarity based on
SEL connection.
Table 1. Voltage Threshold Selection
ADJ1 INPUT ADJ2 INPUT SEL
Positive Polarity
(+) UV or (–) OV
Positive Polarity
(+) UV or (–) OV
V
CC
Positive Polarity
(+) UV or (–) OV
Negative Polarity
(–) UV or (+) OV
Open
Negative Polarity
(–) UV or (+) OV
Negative Polarity
(–) UV or (+) OV
Ground
Note: Open = open circuit or driven by a three-state buffer in high impedance
state with leakage current less than 10A.
If the user’s application requires, the SEL pin may be driven
using a three-state buffer which satisfi es the V
IL
, V
IH
and
leakage of the three-state pin.
LTC2909
9
2909fb
If the state of the SEL pin confi gures a given input as
“negative polarity,” the voltage at the ADJx pin must be
below the trip point (0.5V nominal), or the
R
S
T output will
be pulled low. Conversely, if a given input is confi gured
as “positive polarity,” the pin voltage must be above the
trip point or
R
S
T will assert low.
Thus, a “negative polarity” input may be used to determine
whether a monitored negative voltage is smaller in absolute
value than it should be (–UV), or a monitored positive
voltage is larger than it should be (+OV). The opposite is
true for a “positive polarity” input (–OV or +UV). These
usages are also shown in Table 1. For purposes of this
APPLICATIO S I FOR ATIO
WUU
U
data sheet, a negative voltage is considered “undervoltage”
if it is closer to ground than it should be (e.g., –4.3V for
a –5V supply).
Proper confi guration of the SEL pin and setting of the
trip-points via external resistors allows for any two fault
conditions to be detected. For example, the LTC2909 may
monitor two supplies (positive, negative or one of each)
for UV or for OV (or one UV and one OV). It may also
monitor a single supply (positive or negative) for both UV
and OV. Tables 2a and 2b show example confi gurations
for monitoring possible combinations of fault condition
and supply polarity.
ADJ1
ADJ2 SEL
5V (UV)15V (UV)
R
P2B
1.15M
R
P1B
137k
R
P1A
115k
R
P2A
3.09M
REF
SEL = V
CC
2 Positive UV
ADJ1
ADJ2 SEL
5V (OV)15V (OV)
R
P2B
1.33M
R
P1B
137k
R
P1A
200k
R
P2A
6.19M
REF
2 Positive OV
ADJ1
ADJ2 SEL
5V (UV)15V (UV)
R
N2B
1.37M
R
N1B
133k
R
N1A
107k
R
N2A
3.09M
REF
2 Negative UV
SEL = GND
ADJ1
ADJ2 SEL
5V (OV)15V (OV)
R
N2B
1.37M
R
N1B
118k
R
N1A
309k
R
N2A
10.2M
REF
2 Negative OV
ADJ1
ADJ2 SEL
–15V (OV)15V (UV)
R
N2
10.2M
R
N1
309k
R
P1
115k
R
P2
3.09M
REF
1 Positive UV, 1 Negative OV
ADJ1
ADJ2 SEL
–15V (UV)15V (OV)
R
N2
3.09M
R
N1
107k
R
P1
200k
R
P2
6.19M
REF
1 Positive OV, 1 Negative UV
Table 2a. Possible Combinations of Supply Monitoring. For Example Purposes, All Supplies are Monitored at 5% Tolerance and
Connections are Shown Only for ADJ1, ADJ2, REF, SEL

LTC2909IDDB-3.3#TRPBF

Mfr. #:
Manufacturer:
Analog Devices Inc.
Description:
Supervisory Circuits Dual Supply Monitor with Selectable Polarity
Lifecycle:
New from this manufacturer.
Delivery:
DHL FedEx Ups TNT EMS
Payment:
T/T Paypal Visa MoneyGram Western Union