10/1/03
Page 10 of 15
© 2003 Fairchild Semiconductor Corporation
TTL BUFFER 74OL6000
TTL INVERTER 74OL6001
CMOS BUFFER 74OL6010
CMOS INVERTER 74OL6011
LSTTL TO
OPTOPLANAR
®
HIGH-SPEED
LOGIC-TO-LOGIC OPTOCOUPLERS
NOTE
1. The VCCO and VCCI supply voltages to the device must each be bypassed by a 0.1µF capacitor or larger. This can be either a
ceramic or solid tantalum capacitor with good high frequency characteristics. Its purpose is to stabilize the operation of the high-
gain ampliers. Failure to provide the bypass will impair the DC and switching properties. The total lead length between capaci-
tor and optocoupler should not exceed 1.5mm. See Fig. 20.
2. Device considered a two-terminal device. Pins 1, 2 and 3 shorted together, and Pins 4, 5 and 6 shorted together.
3. For example, assuming a V
CCI
of 5.0V, and an ambient temperature of 70°C, the maximum allowable V
CCO
is 12.1V.
3.2V
1.3V
90%
90%
10%
INPUT, V
I
t
PLH
t
PHL
t
r
t
f
t
f
t
r
t
PHL
1.3V
10%
1.3V
OUTPUT, V
O
(74OL6000)
OUTPUT, V
O
(74OL6001)
t
PLH
Figure 17. 74OL6000/01 Switching Times vs. Ambient Temperature
Figure 19. Common Mode Rejection Waveforms
Figure 20. Suggested PCB Lay-Out
3.2V
1.3V
90%
50%
90%
50%
10%
INPUT, V
I
t
PLH
t
PHL
t
r
t
f
t
f
t
r
t
PHL
10%
OUTPUT, V
O
(74OL6010)
OUTPUT, V
O
(74OL6011)
t
PLH
Figure 18. Switching Parameters 74OL6010/11
V
CM
V
OH
V
OL
0V
50V
dV
CM
dt
V
CM
CM
H
CM
L
V
O
= 2.0V (MIN.)
V
O
= 0.8V (MAX.)
t
r
=
INPUT
V
CC
BUS
DATA
IN
INPUT
GND
BUS
OUTPUT
GND
BUS
OUTPUT
V
CC
BUS
.1µF
1
2
3
.1µF
6
5
4
DATA
OUT
10/1/03
Page 11 of 15
© 2003 Fairchild Semiconductor Corporation
TTL BUFFER 74OL6000
TTL INVERTER 74OL6001
CMOS BUFFER 74OL6010
CMOS INVERTER 74OL6011
LSTTL TO
OPTOPLANAR
®
HIGH-SPEED
LOGIC-TO-LOGIC OPTOCOUPLERS
NOTE
All dimensions are in inches (millimeters)
Package Dimensions (Through Hole) Package Dimensions (Surface Mount)
Package Dimensions (0.4 Lead Spacing) Recommended Pad Layout for
Surface Mount Leadform
0.100 (2.54)
TYP
0.020 (0.51)
MIN
0.350 (8.89)
0.330 (8.38)
0.270 (6.86)
0.240 (6.10)
PIN 1
ID.
0.022 (0.56)
0.016 (0.41)
0.070 (1.78)
0.045 (1.14)
0.200 (5.08)
0.115 (2.92)
0.300 (7.62)
TYP
0° to 15°
0.154 (3.90)
0.100 (2.54)
SE
A
TING PL
A
NE
0.016 (0.40)
0.008 (0.20)
Lead Coplanarity : 0.004 (0.10) MAX
0.270 (6.86)
0.240 (6.10)
0.350 (8.89)
0.330 (8.38)
0.300 (7.62)
TYP
0.405 (10.30)
MAX
0.315 (8.00)
MIN
0.016 (0.40) MIN
2
5
PIN 1
ID.
0.016 (0.41)
0.008 (0.20)
0.100 (2.54)
TYP
0.022 (0.56)
0.016 (0.41)
0.070 (1.78)
0.045 (1.14)
0.200 (5.08)
SEATING PLANE
0.165 (4.18)
4
3
0.020 (0.51)
MIN
1
6
SEATING PLANE
0.016 (0.40)
0.008 (0.20)
0.070 (1.78)
0.045 (1.14)
0.350 (8.89)
0.330 (8.38)
0.154 (3.90)
0.100 (2.54)
0.200 (5.08)
0.135 (3.43)
0.004 (0.10)
MIN
0.270 (6.86)
0.240 (6.10)
0.400 (10.16)
TYP
0° to 15°
0.022 (0.56)
0.016 (0.41)
0.100 (2.54) TYP
PIN 1
ID.
0.070
(
1.78
)
0.060
(
1.52
)
0.030
(
0.76
)
0.100
(
2.54
)
0.295
(
7.49
)
0.415
(
10.54
)
10/1/03
Page 12 of 15
© 2003 Fairchild Semiconductor Corporation
TTL BUFFER 74OL6000
TTL INVERTER 74OL6001
CMOS BUFFER 74OL6010
CMOS INVERTER 74OL6011
LSTTL TO
OPTOPLANAR
®
HIGH-SPEED
LOGIC-TO-LOGIC OPTOCOUPLERS
ORDERING INFORMATION
MARKING INFORMATION
Option Order Entry Identier Description
S .S Surface Mount Lead Bend
SD .SD Surface Mount; Tape and Reel
W .W 0.4" Lead Spacing
300 .300 VDE 0884
300W .300W VDE 0884, 0.4" Lead Spacing
3S .3S VDE 0884, Surface Mount
3SD .3SD VDE 0884, Surface Mount, Tape and Reel
74OL6000
V XX YY K
1
2
6
43
5
Denitions
1 Fairchild logo
2 Device number
3
VDE mark (Note: Only appears on parts ordered with VDE
option See order entry table)
4 Two digit year code, e.g., 03
5 Two digit work week ranging from 01 to 53
6 Assembly package code

74OL6001W

Mfr. #:
Manufacturer:
ON Semiconductor / Fairchild
Description:
High Speed Optocouplers HS/LL Optocoupler LSTTL to TTL Invert
Lifecycle:
New from this manufacturer.
Delivery:
DHL FedEx Ups TNT EMS
Payment:
T/T Paypal Visa MoneyGram Western Union