LT6604-15
7
660415fb
PIN FUNCTIONS
+INA and –INA (Pins 2, 4): Channel A Input Pins. Signals
can be applied to either or both input pins through identi-
cal external resistors, R
IN
. The DC gain from differential
inputs to the differential outputs is 536/R
IN
.
V
OCMA
(Pin 6): DC Common Mode Reference Voltage
for the 2nd Filter Stage in Channel A. Its value programs
the common mode voltage of the differential output of
the fi lter. Pin 6 is a high impedance input, which can be
driven from an external voltage reference, or Pin 6 can be
tied to Pin 34 on the PC board. Pin 6 should be bypassed
with a 0.01µF ceramic capacitor unless it is connected to
a ground plane.
V
–
(Pins 7, 24, 31, 32, 35): Negative Power Supply Pin
(can be ground).
V
MIDB
(Pin 8): The V
MIDB
pin is internally biased at mid-
supply, see Block Diagram. For single supply operation
the V
MIDB
pin should be bypassed with a quality 0.01µF
ceramic capacitor to ground. For dual supply operation,
Pin 8 can be bypassed or connected to a high quality DC
ground. A ground plane should be used. A poor ground
will increase noise and distortion. Pin 8 sets the output
common mode voltage of the 1st Filter Stage in channel B.
It has a 5.5k impedance, and it can be overridden with
an external low impedance voltage source.
+INB and –INB (Pins 10, 12): Channel B Input Pins. Signals
can be applied to either or both input pins through identi-
cal external resistors, R
IN
. The DC gain from differential
inputs to the differential outputs is 536/R
IN
.
V
OCMB
(Pin 14): Is the DC Common Mode Reference
Voltage for the 2nd Filter Stage in Channel B. Its value
programs the common mode voltage of the differential
output of the fi lter. Pin 14 is a high impedance input, which
can be driven from an external voltage reference, or Pin
14 can be tied to Pin 8 on the PC board. Pin 14 should
be bypassed with a 0.01µF ceramic capacitor unless it is
connected to a ground plane.
V
+
A and V
+
B (Pins 25, 17): Positive Power Supply Pins
for Channels A and B. For a single 3.3V or 5V supply (Pins
7, 24, 31, 32 and 35 grounded) a quality 0.1µF ceramic
bypass capacitor is required from the positive supply pin
(Pins 25, 17) to the negative supply pin (Pins 7, 24, 31,
32 and 35). The bypass should be as close as possible to
the IC. For dual supply applications, bypass the negative
supply pins to ground and Pins 25 and 17 to ground with
a quality 0.1µF ceramic capacitor.
+OUTB and –OUTB (Pins 19, 21): O u t p u t P i n s . P i n s 19 a n d
21 are the fi lter differential outputs for channel B. With a
typical short-circuit current limit greater than ±40mA each
pin can drive a 100 and/or 50pF load to AC ground.
+OUTA and –OUTA (Pins 27, 29): Output Pins. Pins 27 and
29 are the fi lter differential outputs for channel A. With a
typical short-circuit current limit greater than ±40mA each
pin can drive a 100 and/or 50pF load to AC ground.
V
MIDA
(Pin 34): The V
MIDA
pin is internally biased at mid-
supply, see Block Diagram. For single supply operation
the V
MIDA
pin should be bypassed with a quality 0.01µF
ceramic capacitor to ground. For dual supply operation,
Pin 34 can be bypassed or connected to a high quality DC
ground. A ground plane should be used. A poor ground
will increase noise and distortion. Pin 34 sets the output
common mode voltage of the 1st stage fi lter stage in chan-
nel A. It has a 5.5k impedance, and it can be overridden
with an external low impedance voltage source.
Exposed Pad (Pin 35): V
–
. The Exposed Pad must be
soldered to the PCB.