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74F257ASCX

P1-P3P4-P6P7-P7
© 2000 Fairchild Semiconductor Corporation DS009507 www.fairchildsemi.com
April 1988
Revised September 2000
74F257A Quad 2-Input Multiplexer with 3-STATE Outputs
74F257A
Quad 2-Input Multiplexer with 3-STATE Outputs
General Description
The 74F257A is a quad 2-input multiplexer with 3-STATE
outputs. Four bits of data from two sources can be selected
using a Common Data Select input. The four outputs
present the selected data in true (non-inverted) form. The
outputs may be switched to a high impedance state with a
HIGH on the common Output Enable (OE
) input, allowing
the outputs to interface directly with bus-oriented systems.
Features
■ Multiplexer expansion by tying outputs together
■ Non-inverting 3-STATE outputs
■ Input clamp diodes limit high-speed termination effects
Ordering Code:
Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.
Logic Symbols
IEEE/IEC
Connection Diagram
Order Number Package Number Package Description
74F257ASC M16A 16-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150 Narrow
74F257ASJ M16D 16-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
74F257APC N16E 16-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide
www.fairchildsemi.com 2
74F257A
Unit Loading/Fan Out
Truth Table
H = HIGH Voltage Level
L = LOW Voltage Level
X = Immaterial
Z = High Impedance
Functional Description
The 74F257A is a quad 2-input multiplexer with 3-STATE
outputs. It selects four bits of data from two sources under
control of a Common Data Select input. When the Select
input is LOW, the I
0x
inputs are selected and when Select
is HIGH, the I
1x
inputs are selected. The data on the
selected inputs appears at the outputs in true (non-
inverted) form. The device is the logic implementation of a
4-pole, 2-position switch where the position of the switch is
determined by the logic levels supplied to the Select input.
The logic equation for the outputs is shown below:
Z
n
= OE • (I
n
• S + I
on
• S)
When the Output Enable input (OE
) is HIGH, the outputs
are forced to a high impedance OFF state. If the outputs
are tied together, all but one device must be in the high
impedance state to avoid high currents that would exceed
the maximum ratings. Designers should ensure the Output
Enable signals to 3-STATE devices whose outputs are tied
together are designed so there is no overlap.
Logic Diagram
Please note that this diagram is provided only for the understanding of logic operations and should not be used to estimate propagation delays.
Pin Names Description
U.L.
Input I
IH
/I
IL
HIGH/LOW
Output I
OH
/I
OL
S Common Data Select Input 1.0/1.0 20 µA/−0.6 mA
OE
3-STATE Output Enable Input (Active LOW) 1.0/1.0 20 µA/−0.6 mA
I
0a
–I
0d
Data Inputs from Source 0 1.0/1.0 20 µA/−0.6 mA
I
1a
–I
1d
Data Inputs from Source 1 1.0/1.0 20 µA/−0.6 mA
Z
a
–Z
d
3-STATE Multiplexer Outputs 150/40 (33.3) −3 mA/24 mA (20 mA)
Output Select Data
Output
Enable Input Inputs
OE
S
I
0
I
1
Z
HXXXZ
LHXLL
LHXHH
LLLXL
LLHXH
3 www.fairchildsemi.com
74F257A
Absolute Maximum Ratings(Note 1) Recommended Operating
Conditions
Note 1: Absolute maximum ratings are values beyond which the device
may be damaged or have its useful life impaired. Functional operation
under these conditions is not implied.
Note 2: Either voltage limit or current limit is sufficient to protect inputs.
DC Electrical Characteristics
Storage Temperature −65°C to +150°C
Ambient Temperature under Bias
−55°C to +125°C
Junction Temperature under Bias
−55°C to +150°C
V
CC
Pin Potential to Ground Pin −0.5V to +7.0V
Input Voltage (Note 2)
−0.5V to +7.0V
Input Current (Note 2)
−30 mA to +5.0 mA
Voltage Applied to Output
in HIGH State (with V
CC
= 0V)
Standard Output
−0.5V to V
CC
3-STATE Output −0.5V to +5.5V
Current Applied to Output
in LOW State (Max) twice the rated I
OL
(mA)
ESD Last Passing Voltage (Min) 4000V
Free Air Ambient Temperature 0
°C to +70°C
Supply Voltage
+4.5V to +5.5V
Symbol Parameter Min Typ Max Units
V
CC
Conditions
V
IH
Input HIGH Voltage 2.0 V Recognized as a HIGH Signal
V
IL
Input LOW Voltage 0.8 V Recognized as a LOW Signal
V
CD
Input Clamp Diode Voltage −1.2 V Min I
IN
= −18 mA
V
OH
Output HIGH 10% V
CC
2.5
VMin
I
OH
= −1 mA
Voltage 10% V
CC
2.4 I
OH
= −3 mA
5% V
CC
2.7 I
OH
= −1 mA
5% V
CC
2.7 I
OH
= −3 mA
V
OL
Output LOW Voltage 10% V
CC
0.5 V Min I
OL
= 24 mA
I
IH
Input HIGH
5.0 µAMaxV
IN
= 2.7V
Current
I
BVI
Input HIGH Current
7.0 µAMaxV
IN
= 7.0V
Breakdown Test
I
CEX
Output HIGH
50 µAMaxV
OUT
= V
CC
Leakage Current
V
ID
Input Leakage
4.75 V 0.0
I
ID
= 1.9 µA
Test All Other Pins Grounded
I
OD
Output Leakage
3.75 µA0.0
V
IOD
= 150 mV
Circuit Current All Other Pins Grounded
I
IL
Input LOW Current −0.6 mA Max V
IN
= 0.5V
I
OZH
Output Leakage Current 50 µAMaxV
OUT
= 2.7V
I
OZL
Output Leakage Current −50 µAMaxV
OUT
= 0.5V
I
OS
Output Short-Circuit Current −60 −150 mA Max V
OUT
= 0V
I
ZZ
Bus Drainage Test 500 µA0.0VV
OUT
= 5.25V
I
CCH
Power Supply Current 9.0 15 mA Max V
O
= HIGH
I
CCL
Power Supply Current 14.5 22 mA Max V
O
= LOW
I
CCZ
Power Supply Current 15 23 mA Max V
O
= HIGH Z
P1-P3P4-P6P7-P7

74F257ASCX

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Manufacturer:
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Description:
MULTIPLEXER QUAD 2IN 3ST 16SOIC
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