8©2016 Integrated Device Technology, Inc Revision A January 13, 2016
84330CI Data Sheet
Applications Information
Power Supply Filtering Technique
As in any high speed analog circuitry, the power supply pins are
vulnerable to random noise. To achieve optimum jitter performance,
power supply isolation is required. The 84330CI provides separate
power supplies to isolate any high switching noise from the outputs
to the internal PLL. V
CC
and V
CCA
should be individually connected
to the power supply plane through vias, and 0.01µF bypass
capacitors should be used for each pin. Figure 2 illustrates this for a
generic V
CC
pin and also shows that V
CCA
requires that an additional
10 resistor along with a 10F bypass capacitor be connected to the
V
CCA
pin.
Figure 2. Power Supply Filtering
Recommendations for Unused Input and Output Pins
Inputs:
LVCMOS Control Pins
All control pins have internal pullups or pulldowns; additional
resistance is not required but can be added for additional protection.
A 1k resistor can be used.
Outputs:
TEST Output
The unused TEST output can be left floating. There should be no
trace attached.
LVPECL Outputs
The unused LVPECL output pair can be left floating. We recommend
that there is no trace attached. Both sides of the differential output
pair should either be left floating or terminated.
Figure 3. Cycle-to-Cycle Jitter vs. fOUT (using a 16MHz crystal)
50
40
30
20
10
0
200 300 600 700400 500
Output Frequency (MHz)
Cycle-to-Cycle Jitter (ps)
N = 1
Spec Limit
