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5CEBA2U15I7

P1-P3P4-P6P7-P9P10-P12P13-P15P16-P18P19-P21P22-P24P25-P27P28-P30P31-P33P34-P36P37-P37
Available Options
Figure 3. Sample Ordering Code and Available Options for Cyclone V GT Devices
Family Signature
Embedded Hard IPs
Transceiver Count
Transceiver
Speed Grade
Package Type
Package Code
Operating Temperature
FPGA Fabric
Speed Grade
GT : 6-Gbps transceivers
F : Maximum 2 hard PCIe and
2 hard memory controllers
5C : Cyclone V
D5 : 77K logic elements
D7 : 150K logic elements
D9 : 301K logic elements
B : 3
F : 4
A : 5
C : 6
D : 9
E : 12
5 : 6.144 Gbps
F : FineLine BGA (FBGA)
U : Ultra FineLine BGA (UBGA)
M : Micro FineLine BGA (MBGA)
FBGA Package Type
23 : 484 pins
27 : 672 pins
31 : 896 pins
35 : 1,152 pins
UBGA Package Type
19 : 484 pins
MBGA Package Type
11 : 301 pins
13 : 383 pins
15 : 484 pins
C : Commercial (T
J
= 0° C to 85° C)
I : Industrial (T
J
= -40° C to 100° C)
A : Automotive (T
J
= -40° C to 125° C)
7
5C
GT F D9 E 5 F 35 C
7
N
Member Code
Family Variant
Optional Suffix
Indicates specific device
options or shipment method
N : Lead-free packaging
Contact Intel for availability
of leaded options
ES : Engineering sample
Maximum Resources
Table 8. Maximum Resource Counts for Cyclone V GT Devices
Resource Member Code
D5 D7 D9
Logic Elements (LE) (K) 77 150 301
ALM 29,080 56,480 113,560
Register 116,320 225,920 454,240
Memory (Kb) M10K 4,460 6,860 12,200
MLAB 424 836 1,717
Variable-precision DSP Block 150 156 342
18 x 18 Multiplier 300 312 684
PLL 6 7 8
6 Gbps Transceiver 6 9 12
GPIO
(5)
336 480 560
LVDS Transmitter 84 120 140
continued...
(5)
The number of GPIOs does not include transceiver I/Os. In the Intel Quartus Prime software,
the number of user I/Os includes transceiver I/Os.
Cyclone V Device Overview
CV-51001 | 2018.05.07
Cyclone V Device Overview
10
Resource Member Code
D5 D7 D9
Receiver 84 120 140
PCIe Hard IP Block 2 2 2
Hard Memory Controller 2 2 2
Related Information
True LVDS Buffers in Devices, I/O Features in Cyclone V Devices
Provides the number of LVDS channels in each device package.
Package Plan
Table 9. Package Plan for Cyclone V GT Devices
Transceiver counts shown are for transceiver ≤5 Gbps . 6 Gbps transceiver channel count support depends on
the package and channel usage. For more information about the 6 Gbps transceiver channel count, refer to the
Cyclone V Device Handbook Volume 2: Transceivers.
Member
Code
M301
(11 mm)
M383
(13 mm)
M484
(15 mm)
U484
(19 mm)
GPIO XCVR GPIO XCVR GPIO XCVR GPIO XCVR
D5 129 4 175 6 — — 224 6
D7 — — — — 240 3 240 6
D9 — — — — — — 240 5
Member
Code
F484
(23 mm)
F672
(27 mm)
F896
(31 mm)
F1152
(35 mm)
GPIO XCVR GPIO XCVR GPIO XCVR GPIO XCVR
D5 240 6 336 6 — — — —
D7 240 6 336 9
(6)
480 9
(6)
— —
D9 224 6 336 9
(6)
480 12
(7)
560 12
(7)
Related Information
6.144-Gbps Support Capability in Cyclone V GT Devices, Cyclone V Device Handbook
Volume 2: Transceivers
Provides more information about 6 Gbps transceiver channel count.
(6)
If you require CPRI (at 6.144 Gbps) and PCIe Gen2 transmit jitter compliance, Intel
recommends that you use only up to three full-duplex transceiver channels for CPRI, and up to
six full-duplex channels for PCIe Gen2. The CMU channels are not considered full-duplex
channels.
(7)
If you require CPRI (at 6.144 Gbps) and PCIe Gen2 transmit jitter compliance, Intel
recommends that you use only up to three full-duplex transceiver channels for CPRI, and up to
eight full-duplex channels for PCIe Gen2. The CMU channels are not considered full-duplex
channels.
Cyclone V Device Overview
CV-51001 | 2018.05.07
Cyclone V Device Overview
11
Cyclone V SE
This section provides the available options, maximum resource counts, and package
plan for the Cyclone V SE devices.
The information in this section is correct at the time of publication. For the latest
information and to get more details, refer to the Product Selector Guide.
Related Information
Product Selector Guide
Provides the latest information about Intel products.
Available Options
Figure 4. Sample Ordering Code and Available Options for Cyclone V SE Devices
The SEU internal scrubbing feature is available for Cyclone V E, GX, SE, and SX devices with the "SC" suffix in
the part number. For device availability and ordering, contact your local Intel sales representatives.
Cyclone V SE and SX low-power devices (L power option) offer 30% static power reduction for devices with
25K LE and 40K LE, and 20% static power reduction for devices with 85K LE and 110K LE.
Family Signature
Embedded Hard IPs
Package Type
Package Code
Operating Temperature
FPGA Fabric
Speed Grade
Optional Suffix
Indicates specific device
options or shipment method
SE : SoC with enhanced logic/memory
5C : Cyclone V
F : FineLine BGA (FBGA)
U : Ultra FineLine BGA (UBGA)
FBGA Package Type
31 : 896 pins
UBGA Package Type
19 : 484 pins
23 : 672 pins
C : Commercial (T
J
= 0° C to 85° C)
I : Industrial (T
J
= -40° C to 100° C)
A : Automotive (T
J
= -40° C to 125° C)
6 (fastest)
7
8
Processor Cores
Omit for dual-core
S : Single-core
N : Lead-free packaging
Contact Intel for availability
of leaded options
ES : Engineering sample
5C
SE M A6 F 31
C
6 S
N
Member Code
Family Variant
A2 : 25K logic elements
A4 : 40K logic elements
A5 : 85K logic elements
A6 : 110K logic elements
B : No hard PCIe or hard
memory controller
M : No hard PCIe and
1 hard memory controller
SC : Internal scrubbing support
L
Power Option
Omit for standard power
L : Low power
Cyclone V Device Overview
CV-51001 | 2018.05.07
Cyclone V Device Overview
12
P1-P3P4-P6P7-P9P10-P12P13-P15P16-P18P19-P21P22-P24P25-P27P28-P30P31-P33P34-P36P37-P37

5CEBA2U15I7

Mfr. #:
Buy 5CEBA2U15I7
Manufacturer:
Intel / Altera
Description:
FPGA - Field Programmable Gate Array
Lifecycle:
New from this manufacturer.
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