74AC374, 74ACT374 — Octal D-Type Flip-Flop with 3-STATE Outputs
©1988 Fairchild Semiconductor Corporation www.fairchildsemi.com
74AC374, 74ACT374 Rev. 1.5.0
January 2008
74AC374, 74ACT374
Octal D-Type Flip-Flop with 3-STATE Outputs
Features
I
CC
and I
OZ
reduced by 50%
Buffered positive edge-triggered clock
3-STATE outputs for bus-oriented applications
Outputs source/sink 24mA
See 273 for reset version
See 377 for clock enable version
See 373 for transparent latch version
See 574 for broadside pinout version
See 564 for broadside pinout version with inverted
outputs
ACT374 has TTL-compatible inputs
General Description
The AC/ACT374 is a high-speed, low-power octal D-type
flip-flop featuring separate D-type inputs for each flip-flop
and 3-STATE outputs for bus-oriented applications. A
buffered Clock (CP) and Output Enable (OE
) are com-
mon to all flip-flops.
Ordering Information
Device also available in Tape and Reel. Specify by appending suffix letter “X” to the ordering number.
All packages are lead free per JEDEC: J-STD-020B standard.
Order
Number
Package
Number Package Description
74AC374SC M20B 20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300" Wide
74AC374SJ M20D 20-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
74AC374MTC MTC20 20-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm
Wide
74AC374PC N20A 20-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300" Wide
74ACT374SC M20B 20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300" Wide
74ACT374SJ M20D 20-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
74ACT374MSA MSA20 20-Lead Shrink Small Outline Package (SSOP), JEDEC MO-150, 5.3mm Wide
74ACT374MTC MTC20 20-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm
Wide
74ACT374PC N20A 20-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300" Wide
©1988 Fairchild Semiconductor Corporation www.fairchildsemi.com
74AC374, 74ACT374 Rev. 1.5.0 2
74AC374, 74ACT374 — Octal D-Type Flip-Flop with 3-STATE Outputs
Connection Diagram
Pin Description
Functional Description
The AC/ACT374 consists of eight edge-triggered flip-
flops with individual D-type inputs and 3-STATE true out-
puts. The buffered clock and buffered Output Enable are
common to all flip-flops. The eight flip-flops will store the
state of their individual D inputs that meet the setup and
hold time requirements on the LOW-to-HIGH Clock (CP)
transition. With the Output Enable (OE
) LOW, the con-
tents of the eight flip-flops are available at the outputs.
When the OE
is HIGH, the outputs go to the high imped-
ance state. Operation of the OE
input does not affect the
state of the flip-flops.
Logic Symbols
IEEE/IEC
Truth Table
H
=
HIGH Voltage Level
L
=
LOW Voltage Level
X
=
Immaterial
Z
=
High Impedance
=
LOW-to-HIGH Transition
Pin
Names Description
D
0
–D
7
Data Inputs
CP Clock Pulse Input
OE
3-STATE Output Enable Input
O
0
–O
7
3-STATE Outputs
Inputs Outputs
D
n
CP OE O
n
HLH
LLL
XXH Z
©1988 Fairchild Semiconductor Corporation www.fairchildsemi.com
74AC374, 74ACT374 Rev. 1.5.0 3
74AC374, 74ACT374 — Octal D-Type Flip-Flop with 3-STATE Outputs
Logic Diagram
Please note that this diagram is provided only for the understanding of logic operations and should not be used to
estimate propagation delays.

74AC374SJX

Mfr. #:
Manufacturer:
ON Semiconductor
Description:
IC FF D-TYPE SNGL 8BIT 20SOP
Lifecycle:
New from this manufacturer.
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