10
FN6406.0
December 15, 2006
Contrast
By varying the voltage between pins VGAIN and VREF, the
gain of the signal path can be changed in the ratio 4:1. The
gain change varies almost linearly with control voltage. For
normal operation it is anticipated the X2 mode will be selected
and the output load will be back matched. A unity gain to the
output load will then be achieved with a gain control voltage of
about 0.35V. This allows the gain to be trimmed up or down by
6dB to compensate for any gain/loss errors that affect the
contrast of the video signal. Figure 26 shows an example plot
of the gain to the load with gain control voltage.
C
ommon Mode Sync Decoding
The ISL59910 features common mode decoding to allow
horizontal and vertical synchronization information, which has
been encoded on the three differential inputs by the EL4543,
to be decoded. The entire RGB video signal can therefore be
transmitted, along with the associated synchronization
information, by using just three twisted pairs.
Decoding is based on the EL4543 encoding scheme, as
described in Figure 26 and Table 1. The scheme is a three-level
system, which has been designed such that the sum of the
common mode voltages results in a fixed average DC level with
no AC content. This eliminates the effect of EMI radiation into
the common mode signals along the twisted pairs of the cable
The common mode voltages are initially extracted by the
ISL59910 from the three input pairs. These are then passed to
an internal logic decoding block to provide Horizontal and
Vertical sync output signals (H
OUT
and V
OUT
).
Power Dissipation
The ISL59910 and ISL59913 are designed to operate with
±5V supply voltages. The supply currents are tested in
production and guaranteed to be less than 39mA per
channel. Operating at ±5V power supply, the total power
dissipation is:
where:
•PD
MAX
= Maximum power dissipation
•V
S
= Supply voltage = 5V
•I
MAX
= Maximum quiescent supply current per
channel = 39mA
•V
OUTMAX
= Maximum output voltage swing of the
application = 2V
R
L
= Load resistance = 150Ω Ω
θ
JA
required for long term reliable operation can be
calculated. This is done using Equation 3:
00.8
V
GAIN
0.4 1
2
1.8
1.4
1
0.6
0.4
GAIN (V)
0.60.2
1.6
1.2
0.8
FIGURE 25. VARIATION OF GAIN WITH GAIN CONTROL
VOLTAGE
TABLE 1. H AND V SYNC DECODING
RED CM GREEN CM BLUE CM H
SYNC
V
SYNC
Mid High Low Low Low
High Low Mid Low High
Low High Mid High Low
Mid Low High High High
NOTE: Level ‘Mid’ is halfway between ‘High’ and ‘Low’
TIME (0.5ms/DIV)
VOLTAGE
(0.5V/DIV)
BLUE CM
OUT (CH A)
GREEN CM
OUT (CH B)
RED CM
OUT (CH C)
V
SYNC
H
SYNC
VOLTAGE
(2.5V/DIV)
FIGURE 26. H AND V SYNCS ENCODED
PD
MAX
32V
S
× I
SMAX
V
S
( - V
OUTMAX
)
V
OUTMAX
R
L
----------------------------
×+××=
(EQ. 1)
PD
MAX
1.29W=
(EQ. 2)
ISL59910, ISL59913
