MC14022BD

MC14022B
http://onsemi.com
4
SWITCHING CHARACTERISTICS (Note 5) (C
L
= 50 pF, T
A
= 25C)
Characteristic Symbol V
DD
Vdc
Min Typ
(Note 6)
Max Unit
Output Rise and Fall Time
t
TLH
, t
THL
= (1.5 ns/pF) C
L
+ 25 ns
t
TLH
, t
THL
= (0.75 ns/pF) C
L
+ 12.5 ns
t
TLH
, t
THL
= (0.55 ns/pF) C
L
+ 9.5 ns
t
TLH
,
t
THL
5.0
10
15
100
50
40
200
100
80
ns
Propagation Delay Time
Reset to Decode Output
t
PLH
, t
PHL
= (1.7 ns/pF) C
L
+ 415 ns
t
PLH
, t
PHL
= (0.66 ns/pF) C
L
+ 197 ns
t
PLH
, t
PHL
= (0.5 ns/pF) C
L
+ 150 ns
t
PLH
,
t
PHL
5.0
10
15
500
230
175
1000
460
350
ns
Propagation Delay Time
Clock to C
out
t
PLH
, t
PHL
= (1.7 ns/pF) C
L
+ 315 ns
t
PLH
, t
PHL
= (0.66 ns/pF) C
L
+ 142 ns
t
PLH
, t
PHL
= (0.5 ns/pF) C
L
+ 100 ns
t
PLH
,
t
PHL
5.0
10
15
400
175
125
800
350
250
ns
Propagation Delay Time
Clock to Decode Output
t
PLH
, t
PHL
= (1.7 ns/pF) C
L
+ 415 ns
t
PLH
, t
PHL
= (0.66 ns/pF) C
L
+ 197 ns
t
PLH
, t
PHL
= (0.5 ns/pF) C
L
+ 150 ns
t
PLH
,
t
PHL
5.0
10
15
275
125
95
1000
460
350
ns
Turn−Off Delay Time
Reset to C
out
t
PLH
= (1.7 ns/pF) C
L
+ 315 ns
t
PLH
= (0.66 ns/pF) C
L
+ 142 ns
t
PLH
= (0.5 ns/pF) C
L
+ 100 ns
t
PLH
5.0
10
15
400
175
125
800
350
250
ns
Clock Pulse Width t
WH
5.0
10
15
250
100
75
125
50
35
ns
Clock Frequency f
cl
5.0
10
15
5.0
12
16
2.0
5.0
6.7
MHz
Reset Pulse Width t
WH
5.0
10
15
500
250
190
250
125
95
ns
Reset Removal Time t
rem
5.0
10
15
750
275
210
375
135
105
ns
Clock Input Rise and Fall Time t
TLH
, t
THL
5.0
10
15
No Limit
Clock Enable Setup Time t
su
5.0
10
15
350
150
115
175
75
52
ns
Clock Enable Removal Time t
rem
5.0
10
15
420
200
140
260
100
70
ns
5. The formulas given are for the typical characteristics only at 25C.
6. Data labelled “Typ” is not to be used for design purposes but is intended as an indication of the IC’s potential performance.
MC14022B
http://onsemi.com
5
Figure 1. Typical Output Source and Output Sink Characteristics Test Circuit
V
DD
V
SS
V
SS
V
DD
V
SS
A
B
S1
C
out
Q7
Q6
Q5
Q4
Q3
Q2
Q1
Q0
CLOCK
CLOCK
ENABLE
RESET
V
out
I
D
EXTERNAL
POWER
SUPPLY
Output
Sink Drive
Output
Source Drive
Outputs
Clock to desired
Output
(S1 to B)
(S1 to A)
Carry
Clock to Q5
thru Q7
(S1 to B)
S1 to A
V
GS
=− V
DD
V
DD
V
DS
=V
out
− V
DD
V
out
Figure 2. Typical Power Dissipation Test Circuit
V
DD
V
SS
C
out
Q7
Q6
Q5
Q4
Q3
Q2
Q1
Q0
CLOCK
CLOCK
ENABLE
RESET
I
D
PULSE
GENERATOR
500 F
0.01 F
CERAMIC
f
c
C
L
C
L
C
L
C
L
C
L
C
L
C
L
C
L
C
L
APPLICATIONS INFORMATION
Figure 3 shows a technique for extending the number of decoded output states for the MC14022B. Decoded outputs are
sequential within each stage and from stage to stage, with no dead time (except propagation delay).
Figure 3. Counter Expansion
R
C
CE
MC14022B
Q0 Q1 Q6 Q7
•••
7 DECODED
OUTPUTS
CLOCK
FIRST STAGE INTERMEDIATE STAGES LAST STAGE
R
C
CE
MC14022B
Q0 Q1 Q6 Q7
•••
R
C
CE
MC14022B
Q1 Q6 Q7
•••
6 DECODED
OUTPUTS
6 DECODED
OUTPUTS
MC14022B
http://onsemi.com
6
Figure 4. AC Measurement Definition and Functional Waveforms
CLOCK
CLOCK
ENABLE
RESET
Q0
Q1
Q2
Q3
Q4
Q5
Q6
Q7
C
out
t
WH
t
WL
t
rem
t
PHL
t
PLH
t
PLH
t
PLH
t
PLH
t
PLH
t
TLH
t
PLH
t
PLH
t
PHL
t
PHL
t
PHL
t
PHL
t
PHL
t
PHL
t
THL
t
PHL
t
PHL
t
TLH
t
PHL
t
THL
t
rel
t
su
20 ns
20 ns
20 ns 20 ns
20 ns
t
PLH
t
THL
t
PLH
50%
90% 50%
10%
t
TLH
t
TLH
t
TLH
t
TLH
t
PHL
t
TLH
t
THL
t
THL
t
TLH
t
PLH
90%
50%
10%
V
DD
V
SS
V
SS
V
SS
V
OL
V
OL
V
OL
V
OL
V
OL
V
OL
V
OL
V
OL
V
OL
V
OH
V
OH
V
OH
V
OH
V
OH
V
OH
V
OH
V
OH
V
OH
V
DD
V
DD
ORDERING INFORMATION
Device Package Shipping
MC14022BCP PDIP−16 500 Units / Rail
MC14022BCPG PDIP−16
(Pb−Free)
500 Units / Rail
MC14022BD SOIC−16 48 Units / Rail
MC14022BDG SOIC−16
(Pb−Free)
48 Units / Rail
MC14022BDR2 SOIC−16 2500 Units / Tape & Reel
MC14022BDR2G SOIC−16
(Pb−Free)
2500 Units / Tape & Reel
For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging
Specifications Brochure, BRD8011/D.

MC14022BD

Mfr. #:
Manufacturer:
ON Semiconductor
Description:
IC COUNTER OCTAL 4STAGE 16-SOIC
Lifecycle:
New from this manufacturer.
Delivery:
DHL FedEx Ups TNT EMS
Payment:
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