4
FN9176.1
February 8, 2005
Block Diagram
COUNTER
OVERCURRENT
PROTECTION
LOGIC SCHEME 1
OLF
DCL
OC
CLK
PWM
LOGIC
Q
S
GATE
PGND
CS
CS
AMP
ILIM
SLOPE
COMPENSATION
COMP
FB
VOUT
VCC
SGND
BYPASS
CPVOUT
CPSWIN
CPSWOUT
CHARGE PUMP
THERMAL
SHUTDOWN
OTF
SDA
OLF
ISEL
EN
OTF
LLC VSEL
DCL
SCL
ADDR
ENT
OSC.
220kHz
CLK
I
2
C
INTERFACE
BAND GAP
REF VOLTAGE
ADJ
REF
VOLTAGE
TONE
INJ
CKT
22kHz
TONE
TCAP
÷ 10 AND
WAVE SHAPING
AGND
+
-
EN
SOFT-START
INT 5V
ON CHIP
LINEAR
UVLO
POR
SOFT-START
VSW
+
-
BGV
VREF
ADDR
SCL
+
-
ENT
DSQIN
SDA
SEL18V
7
15
16
17
19
27
26
251821
10
E PAD
11
13
12
14
20
28
6
9
ISL6425
5
FN9176.1
February 8, 2005
Absolute Maximum Ratings Thermal Information
Supply Voltage, V
CC
. . . . . . . . . . . . . . . . . . . . . . . . . . 8.0V to 18.0V
Logic Input Voltage Range
(SDA, SCL, ENT, DSQIN, SEL18V) . . . . . . . . . . . . . . -0.5V to 7V
Output Current . . . . . . . . . . . . . . . . . . . . Externally/Internally Limited
Thermal Resistance θ
JA
(°C/W) θ
JC
(°C/W)
QFN Package (Notes 1, 2) . . . . . . . . 32 4
Maximum Junction Temperature . . . . . . . . . . . . . . . . . . . . . . 150°C
Maximum Storage Temperature Range . . . . . . . . . . . -40°C to 150°C
Maximum Lead Temperature (Soldering 10s) . . . . . . . . . . . . 300°C
NOTE: The device junction temperature should be kept below
150°C. Thermal shut-down circuitry turns off the device if junction
temperature exceeds +150°C typically.
CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the
device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
NOTES:
1. θ
JA
is measured in free air with the component mounted on a high effective thermal conductivity test board with “direct attach” features. See
Tech Brief TB379.
2. For θ
JC
, the “case temperature” location is the center of the exposed metal pad on the package underside. See Tech Brief TB379.
Electrical Specifications V
CC
= 12V, T
A
= -20°C to +85°C, unless otherwise noted. Typical values are at T
A
= 25°C. EN = H, LLC = L,
ENT = L, DCL = L, DSQIN = L, I
OUT
= 12mA, unless otherwise noted. See software description section for I
2
C
access to the system.
PARAMETER SYMBOL TEST CONDITIONS MIN TYP MAX UNITS
Operating Supply Voltage Range 81214 V
Standby Supply Current EN = L - 1.5 3.0 mA
Supply Current I
IN
EN = LLC = VSEL = ENT = H, No Load - 4.0 8.0 mA
UNDERVOLTAGE LOCKOUT
Start Threshold 7.5 - 7.95 V
Stop Threshold 7.0 - 7.55 V
Start to Stop Hysteresis 350 400 500 mV
SOFT-START
COMP Rise Time (Note 2) (Note 4) - 1024 - Cycles
OUTPUT VOLTAGE
Output Voltage (Note 3) V
OUT
VSEL = L, LLC = L 12.74 13.0 13.26 V
V
OUT
VSEL = L, LLC = H 13.72 14.0 14.28 V
V
OUT
VSEL = H, LLC = L 17.64 18.0 18.36 V
V
OOU
VSEL = H, LLC = H 18.62 19.0 19.38 V
Line Regulation DV
OUT
V
IN
= 8V to 14V; V
OUT
= 13V - 4.0 40.0 mV
V
IN
= 8V to 14V; V
OUT
= 18V - 4.0 60.0 mV
Load Regulation DV
OUT
I
O
= 12mA to 450mA - 50 80 mV
Dynamic Output Current Limiting I
MAX
DCL = L, ISEL = L 425 - 550 mA
DCL = L, ISEL = H 775 - 950 mA
Dynamic Overload Protection Off Time TOFF DCL = L, Output Shorted (Note 4) - 900 - ms
Dynamic Overload Protection On Time TON - 20 - ms
22kHz TONE
Tone Frequency f
tone
ENT = H 20.0 22.0 24.0 kHz
Tone Amplitude V
tone
ENT = H 550 680 900 mV
Tone Duty Cycle dc
tone
ENT = H (Note 5) 40 50 60 %
Tone Rise or Fall Time T
r
, T
f
ENT = H 5 8 14 µs
ISL6425
6
FN9176.1
February 8, 2005
LINEAR REGULATOR
Drop-Out Voltage Iout = 450mA (Note 4) - 1.2 - V
DSQIN, SEL18V INPUT PINs (Note 6)
Asserted Low --0.8V
Asserted HIGH 1.7 - - V
Input Current -1-µA
CURRENT SENSE
Input Bias Current I
BIAS
- 700 - nA
Overcurrent Threshold Static current mode, DCL = H 325 400 500 mV
ERROR AMPLIFIER
Open Loop Voltage Gain A
OL
(Note 4) 70 88 - dB
Gain Bandwidth Product
GBP
(Note 4) 10 - - MHz
PWM
Maximum Duty Cycle 90 93 - %
Minimum Pulse Width (Note 4) - 20 - ns
OSCILLATOR
Oscillator Frequency f
o
Fixed at (10)(f
tone
) 200 220 240 kHz
THERMAL PROTECTION
Thermal Shutdown
Temperature Shutdown Threshold (Note 4) - 150 -
Temperature Shutdown Hysteresis (Note 4) - 20 -
NOTES:
3. Internal Digital Soft-start
4. Voltage programming signals VSEL and LLC are implemented via the I
2
C bus.
IO = 450mA.
5. Guaranteed by Design.
6. Unused DSQIN pin should be connected to GND. SEL18V pins is internally connected to GND by a 200K resistor.
Electrical Specifications V
CC
= 12V, T
A
= -20°C to +85°C, unless otherwise noted. Typical values are at T
A
= 25°C. EN = H, LLC = L,
ENT = L, DCL = L, DSQIN = L, I
OUT
= 12mA, unless otherwise noted. See software description section for I
2
C
access to the system. (Continued)
PARAMETER SYMBOL TEST CONDITIONS MIN TYP MAX UNITS
ISL6425

ISL6425ER

Mfr. #:
Manufacturer:
Renesas / Intersil
Description:
IC REG CONV SATELLIT 2OUT 32QFN
Lifecycle:
New from this manufacturer.
Delivery:
DHL FedEx Ups TNT EMS
Payment:
T/T Paypal Visa MoneyGram Western Union

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