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© 06/2012 by ams
Subject to change without notice
Headquarters
ams AG
Tobelbader Strasse 30, 8141 Unterpremstaetten, Austria
Phone +43 3136 500-0 · Fax +43 3136 525-01
General Description
The AS8506 features simultaneous cell voltage comparison with upper and lower
threshold, active- or optionally passive cell balancing by simultaneous comparison of
actual cell voltages with a target cell voltage. Cells which are below target will either
cyclically receive charge packages from an isolated DCDC converter or, optionally,
cells above target will cyclically be discharged by an external ying resistor through
integrated switches in an autonomous way.
The device can exibly be used for battery stacks of 3 up to 7 cells. It can be chained
to support battery packs of virtually any number of cells in a synchronized mode.
Autonomous monitoring and balancing is triggered through control signal while
absolute cell voltages / temperatures are accessible in communication mode. Direct
action diagnosis signals are available to report cell voltage within limits and balance
ready signal. Target cell voltage, min and max cell voltage are broadcasted to all of
the chained devices during short communication slots. Together with autonomous
monitoring and balancing this signicantly reduces data communication compared to
existing solutions and improves EMC robustness.
FeaturesSpecications
- Simultaneous cell voltage capture for balancing and SOA monitoring to
reduce lter/synchronization eort and intentionally enables continuous
balancing also under entire load and charge phase
- Autonomous balancing and SOA monitoring strongly reduces data
communication and data processing and thereby improves EMC robustness
- Active charge balancing with very few external components for good
eciency and little heat dissipation. One small y back transformer per
14 cells, all switches integrated
- For active balancing true energy redistribution if energy is taken from
entire pack. Optional energy source from PV or 12V board net
- Absolute cell voltage readout for OCV capture and cell impedance calculation.
Readout of 2 temperature sensors
- QFN-40 6x6 package
AS8506 Block Diagram
Operating Supply Range [V] 6 to 32
Operating Temperature [°C] -40 to +85 Ambient
Number of cells per IC 3-7
Typical standby quiescent current [µA] 14
Balancing current [mA] typically 100
Balancing target accuracy over
full temperature range [mV]
10
Cell voltage target accuracy [mV] 10
Cell voltage range [V] 1,5 – 4,5
12 bit ADC for cell voltage capture.
Accuracy target [mV]
±5
8 bit ADC for temperature capture.
Accuracy target [°C]
±3
5V
C_out1
C_out2
C_out3
C_out4
C_out5
C_out6
C_out7
VCELL6
LDO
High
Precision
Reference
DAC_IN[11:0]
Level Shifters for Stack Communication / Status Signals
EXT_RES_CTL
VCELL5
VCELL4
VCELL3
VCELL2
VCELL1
VCELL7
Level Shifters
DAC
Pre-regulator
comp1
comp2
comp3
comp4
comp5
comp6
comp7
Cnt1
Cnt2
Cnt3
Cnt4
Cnt5
Cnt6
Cnt7
Balance and VREF_H
Switches Level Shifters
Stack signals
Stack
signals
VCELL[7:1]
RC Oscillator &
PWM Driver
C-GND
VCELL1
VCELL2
VCELL3
VCELL4
VCELL5
VCELL6
Cnt1H
Cnt2L
Cnt1L
Cnt2H
Cnt3L
Cnt3H
Cnt4L
Cnt4H
Cnt5L
Cnt5H
Cnt6L
Cnt6H
Cnt7L
GND
NC
NC_T
WAKE_IN
BD_OUT
TSECH
TSECL
MS_SL
FD_OUT
CVT_NOK_OUT
VCELL7
Cnt7H
Multiplexer & SAR Logic
Zero Cross
Detection Circuit
V5V
CELL_THU
CELL_THL
CVT_NOK_IN
VREF_IN
TRIG_OUT
SCLK
SDO
SDI
TEMP_IN1
TRIG_IN
CS
TEMP_IN2
REF_T
CLK_IN
Temperature
Sensor /
Switch
Capacitor
Circuit
Over-temperature
Monitor
VREF_H
CLK_OUT
FD_IN
WAKE_OUT
V5V_IN
VSUP
BD_IN
Reference &
Threshold
Generation Circuit
FSM,
Digital Registers,
OTP Logic
AS8506
