DS1831C/D/E
8 of 15
APPLICATION DIAGRAM—OPEN DRAIN OUTPUTS Figure 7
NOTE: If outputs are at different voltages the outputs can not be connected to form a wired AND.
OPERATION—NON-MASKABLE INTERRUPT
The DS1831 has two referenced comparators (DS1831D has only one referenced comparator) that can be
used to monitor upstream voltages or other system specific voltages. Each comparator is referenced to the
1.25V internal band gap reference and controls an open-drain output. When a voltage being monitored
decays to the voltage sense point, the DS1831 pulses the NMI output to the active state for a minimum
10µs. The comparator detection circuitry also has built-in hysteresis of 100µV. The supply must be below
the voltage sense point for approximately 2µs before a low NMI will be generated. In this way, power
supply noise is minimized in the monitoring function, reducing false interrupts. See Figure 8 for the non-
maskable timing diagram.
Versatile trip voltages can be configured by the use of an external resistor divider to divide the voltage at
a sense point to the 1.25V trip levels of the referenced comparators. See Figure 9 for an example circuit
diagram and sample equations. The equations demonstrate a design process to determine the resistor
values to use.
Connecting one or both
NMI outputs to one of the reset specific PBRST s allows the non-maskable
interrupt to generate an automatic reset for the reset time period when an out-of-tolerance condition
occurs in a monitored supply. An example is shown in Figure 9.
The output associated with the specific input will be held low if the voltage on the input pin is less than
1.25V. If the voltage is above 1.25V the output will not sink current and will be pulled up by the required
pull-up resistor. The value of the resistors is not critical in most cases but must be set low enough to pull
the output to a high state. A common value used is 10kW. If an NMI output is connected to a pushbutton
input an additional pull-up resistor can be used (to improve speed of transitions) but is not required.
During a power-up, any detected IN pin levels above V
TP
by the comparator are disabled from generating
an inactive (high) interrupt until at least one supply on the V
IN
inputs rises above 1.5V. All NMI outputs
will be held active (low) until at least one V
IN
reaches 1.5V at which point the NMI outputs will be based
on the value of the associated IN input.
RST
2.5V
PBRST
3.3V
GND
TD
2.5V
IN
3.3v
IN
2.5V
RST
3.3V
TOL
3.3V
PBRST
2.5V
TOL
2.5V
DS1831C
TD
3.3V
2.5V Supply
3.3V Supply
1
2
3
4
5
16
15
14
13
12
10 KW
