1. General description
The 74LV04 is a low-voltage Si-gate CMOS device that is pin and function compatible with
74HC04 and 74HCT04.
The 74LV04 provides six inverting buffers.
2. Features
■ Wide operating voltage: 1.0 V to 5.5 V
■ Optimized for low voltage applications: 1.0 V to 3.6 V
■ Accepts TTL input levels between V
CC
= 2.7 V and V
CC
= 3.6 V
■ Typical output ground bounce < 0.8 V at V
CC
= 3.3 V and T
amb
= 25 °C
■ Typical HIGH-level output voltage (V
OH
) undershoot: > 2 V at V
CC
= 3.3 V and
T
amb
=25°C
■ ESD protection:
◆ HBM JESD22-A114E exceeds 2000 V
◆ MM JESD22-A115-A exceeds 200 V
■ Multiple package options
■ Specified from −40 °Cto+85°C and from −40 °C to +125 °C
3. Ordering information
74LV04
Hex inverter
Rev. 03 — 4 December 2007 Product data sheet
Table 1. Ordering information
Type number Package
Temperature range Name Description Version
74LV04N −40 °C to +125 °C DIP14 plastic dual in-line package; 14 leads (300 mil) SOT27-1
74LV04D −40 °C to +125 °C SO14 plastic small outline package; 14 leads;
body width 3.9 mm
SOT108-1
74LV04DB −40 °C to +125 °C SSOP14 plastic shrink small outline package; 14 leads;
body width 5.3 mm
SOT337-1
74LV04PW −40 °C to +125 °C TSSOP14 plastic thin shrink small outline package; 14 leads;
body width 4.4 mm
SOT402-1
74LV04BQ −40 °C to +125 °C DHVQFN14 plastic dual in-line compatible thermal enhanced very
thin quad flat package; no leads; 14 terminals;
body 2.5 × 3 × 0.85 mm
SOT762-1
