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NTTFS4824NTAG

P1-P3P4-P6
NTTFS4824N
http://onsemi.com
4
TYPICAL CHARACTERISTICS
0
10
20
30
40
50
60
70
80
90
0123450.5
Figure 1. On−Region Characteristics
V
DS
, DRAIN−TO−SOURCE VOLTAGE (V)
I
D
, DRAIN CURRENT (A)
10 V
T
J
= 25°C
V
GS
= 4.5 V
5.0 V
4.0 V
3.8 V
3.6 V
3.4 V
3.2 V
4.2 V
0
25
50
75
100
125
23456
I
D
, DRAIN CURRENT (A)
Figure 2. Transfer Characteristics
V
GS
, GATE−TO−SOURCE VOLTAGE (V)
V
DS
≥ 10 V
T
J
= 25°C
T
J
= 100°C
T
J
= −55°C
0.002
0.003
0.004
346810
Figure 3. On−Resistance vs. Gate−to−Source
Voltage
V
GS
, GATE−TO−SOURCE VOLTAGE (V)
I
D
= 20 A
T
J
= 25°C
R
DS(on)
, DRAIN−TO−SOURCE RESISTANCE (W)
0.002
0.003
0.004
0.005
0.006
0.007
0.008
50 60 70 80 90 100 110 120
Figure 4. On−Resistance vs. Drain Current and
Gate Voltage
I
D
, DRAIN CURRENT (A)
R
DS(on)
, DRAIN−TO−SOURCE RESISTANCE (W)
V
GS
= 4.5 V
V
GS
= 10 V
T
J
= 25°C
0.6
0.8
1
1.2
1.4
1.6
1.8
−50 −25 0 25 50 75 100 125 150
Figure 5. On−Resistance Variation with
Temperature
T
J
, JUNCTION TEMPERATURE (°C)
R
DS(on)
, DRAIN−TO−SOURCE
RESISTANCE (NORMALIZED)
I
D
= 20 A
V
GS
= 10 V
10
100
1000
10000
5 1015202530
Figure 6. Drain−to−Source Leakage Current
vs. Voltage
V
DS
, DRAIN−TO−SOURCE VOLTAGE (V)
I
DSS
, LEAKAGE (nA)
T
J
= 150°C
V
GS
= 0 V
T
J
= 125°C
7.0 V
0.005
0.006
0.007
0.008
0.009
0.010
579
100
110
120
130
1.5 2.5 3.5 4.5
0.009
0.010
20 30 40
0.5
0.7
0.9
1.1
1.3
1.5
1.7
NTTFS4824N
http://onsemi.com
5
TYPICAL CHARACTERISTICS
0
1000
3000
0 5 10 15 20 25 30
Figure 7. Capacitance Variation
GATE−TO−SOURCE OR DRAIN−TO−SOURCE VOLTAGE (V)
C, CAPACITANCE (pF)
V
GS
= 0 V
T
J
= 25°C
C
oss
C
iss
C
rss
0
2
4
6
8
10
12
04812162024
Figure 8. Gate−to−Source and
Drain−to−Source Voltage vs. Total Charge
Q
g
, TOTAL GATE CHARGE (nC)
V
GS
, GATE−TO−SOURCE VOLTAGE (V)
I
D
= 20 A
T
J
= 25°C
QT
V
GS
Q
gd
Q
gs
1
10
100
1000
1 10 100
Figure 9. Resistive Switching Time Variation
vs. Gate Resistance
R
G
, GATE RESISTANCE (W)
t, TIME (ns)
V
DD
= 15 V
I
D
= 15 A
V
GS
= 10 V
t
f
t
r
t
d(off)
t
d(on)
0
5
10
15
20
25
30
0.4 0.5 0.6 0.7 0.8 0.9 1
Figure 10. Diode Forward Voltage vs. Current
V
SD
, SOURCE−TO−DRAIN VOLTAGE (V)
I
S
, SOURCE CURRENT (A)
V
GS
= 0 V
T
J
= 25°C
0.01
1
10
100
1000
0.1 1 10 100
Figure 11. Maximum Rated Forward Biased
Safe Operating Area
V
DS
, DRAIN−TO−SOURCE VOLTAGE (V)
I
D
, DRAIN CURRENT (A)
10 ms
100 ms
1 ms
10 ms
dc
V
GS
= 20 V
Single Pulse
T
C
= 25°C
R
DS(on)
Limit
Thermal Limit
Package Limit
0
25
50
75
25 50 75 100 125 150
Figure 12. Maximum Avalanche Energy vs.
Starting Junction Temperature
T
J
, STARTING JUNCTION TEMPERATURE(°C)
E
AS
, SINGLE PULSE DRAIN−TO−
SOURCE AVALANCHE ENERGY (mJ)
I
D
= 38 A
0.1
2000
28 32
NTTFS4824N
http://onsemi.com
6
PACKAGE DIMENSIONS
WDFN8 3.3x3.3, 0.65P
CASE 511AB
ISSUE D
M 1.40 1.50
q 0 −−−
_
1.60
12
_
NOTES:
1. DIMENSIONING AND TOLERANCING PER ASME Y14.5M, 1994.
2. CONTROLLING DIMENSION: MILLIMETERS.
3. DIMENSION D1 AND E1 DO NOT INCLUDE MOLD FLASH
PROTRUSIONS OR GATE BURRS.
1234
56
TOP VIEW
SIDE VIEW
BOTTOM VIEW
D1
E1
q
D
E
B
A
0.20
C
0.20 C
2X
2X
DIM MIN NOM
MILLIMETERS
A 0.70 0.75
A1 0.00 −−−
b 0.23 0.30
c 0.15 0.20
D
D1 2.95 3.05
D2 1.98 2.11
E
E1 2.95 3.05
E2 1.47 1.60
e 0.65 BSC
G 0.30 0.41
K 0.65 0.80
L 0.30 0.43
L1 0.06 0.13
A
0.10 C
0.10 C
DETAIL A
14
8
L1
e/2
8X
D2
G
E2
K
b
A0.10 BC
0.05 C
L
DETAIL A
A1
e
6X
c
4X
C
SEATING
PLANE
5
MAX
0.80
0.05
0.40
0.25
3.15
2.24
3.15
1.73
0.51
0.95
0.56
0.20
M
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
SOLDERING FOOTPRINT*
0.650.42
0.75
2.30
3.46
PACKAGE
8X
0.055 0.059
0 −−−
_
0.063
12
_
0.028 0.030
0.000 −−−
0.009 0.012
0.006 0.008
0.116 0.120
0.078 0.083
0.116 0.120
0.058 0.063
0.026 BSC
0.012 0.016
0.026 0.032
0.012 0.017
0.002 0.005
0.031
0.002
0.016
0.010
0.124
0.088
0.124
0.068
0.020
0.037
0.022
0.008
MIN NOM
INCHES
MAX
78
PITCH
3.60
0.57
0.47
OUTLINE
DIMENSION: MILLIMETERS
3.30 BSC
3.30 BSC
0.130 BSC
0.130 BSC
2.37
0.66
4X
E3 0.23 0.30 0.40
0.009 0.012 0.016
E3
4X
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to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability
arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages.
“Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All
operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights
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NTTFS4824N/D
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NTTFS4824NTAG

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MOSFET NFET U8FL 30V 69A 7.5mOhm
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