LTC1064-4
1
10644fb
FEATURES
APPLICATIO S
U
DESCRIPTIO
U
TYPICAL APPLICATIO
U
■
Antialiasing Filters
■
Telecom Filters
■
Sinewave Generators
■
8th Order Filter in a 14-Pin Package
■
80dB or More Stopband Attenuation at 2 × f
CUTOFF
■
50:1, f
CLK
to f
CUTOFF
Ratio (Cauer)
100:1, f
CLK
to f
–3dB
Ratio (Transitional)
■
135µV
RMS
Total Wideband Noise
■
0.03% THD or Better
■
100kHz Maximum f
CUTOFF
Frequency
■
Operates up to ±8V Power Supplies
■
Input Frequency Range up to 50 Times the Filter
Cutoff Frequency
Low Noise, 8th Order, Clock
Sweepable Cauer Lowpass Filter
The LTC
®
1064-4 is an 8th order, clock sweepable Cauer
lowpass switched capacitor filter. An external TTL or
CMOS clock programs the value of the filter’s cutoff
frequency. With Pin 10 at V
+
, the f
CLK
to f
CUTOFF
ratio is
50:1; the filter has a Cauer response and with compensa-
tion the passband ripple is ±0.1dB. The stopband attenu-
ation is 80dB at 2 × f
CUTOFF
. Cutoff frequencies up to
100kHz can be achieved. With Pin 10 at V
–
, the f
CLK
to
f
–3dB
ratio is 100:1, the filter has a transitional Butterworth-
Cauer response with lower noise and lower delay
nonlinearity than the Cauer response. The stopband
attenuation at 2.5 × f
–3dB
is 92dB. Cutoff frequencies up to
50kHz can be achieved.
The LTC1064-4 features low noise and low harmonic
distortion even when input voltages up to 3V
RMS
are
applied. The LTC1064-4 overall performance competes
with equivalent multiple op amp active realizations. The
LTC1064-4 is pin compatible with the LTC1064-1,
LTC1064-2 and LTC1064-3.
The LTC1064-4 is manufactured using Linear Technology’s
enhanced LTCMOS
TM
silicon gate process.
8th Order Clock Sweepable Lowpass Elliptic Filter Frequency Response
FREQUENCY (Hz)
1k
V
OUT
/V
IN
(dB)
20
0
–20
–40
–60
–80
–100
10k 100k 1M
1064-4 TA01b
f
CLK
= 1MHz, 100:1
T
A
= 25°C
f
CLK
= 2MHz, 50:1
f
CLK
= 5MHz, 50:1
C
COMP1
= 30pF, C
COMP2
= 18pF
* FOR FREQUENCIES ABOVE 20kHz AND MINIMUM PASSBAND RIPPLE REFER
TO THE PIN DESCRIPTION SECTION FOR COMPENSATION GUIDELINES.
V
+
/V
–
LTC1064-4
1
2
3
4
5
6
7
14
13
12
11
10
9
8
R(h, I)
COMP2*
V
–
f
CLK
50/100
V
OUT
NC
INV C
V
IN
AGND
V
+
AGND
COMP1*
INV A
1064 TA01
CLOCK
(TTL, ≤5MHz)
–8V
8V
V
OUT
V
IN
0.1µF
0.1µF
NOTE:THE POWER SUPPLIES SHOULD BE BYPASSED BY A 0.1µF CAPACITOR
CLOSE TO THE PACKAGE. BYPASSING PIN 10 WITH 0.1µF CAPACITOR
REDUCES CLOCK FEEDTHROUGH. THE CONNECTION BETWEEN PINS 7
AND 14 SHOULD BE PHYSICALLY DONE UNDER THE PACKAGE.
LTCMOS is a trademark of Linear Technology Corporation.
, LTC and LT are registered trademarks of Linear Technology Corporation.
