1. General description
The 74HC138; 74HCT138 decodes three binary weighted address inputs (A0, A1 and A2)
to eight mutually exclusive outputs (Y
0 to Y7). The device features three enable inputs
(E
1, E2 and E3). Every output will be HIGH unless E1 and E2 are LOW and E3 is HIGH.
This multiple enable function allows easy parallel expansion to a 1-of-32 (5 to 32 lines)
decoder with just four ‘138’ ICs and one inverter. The ‘138’ can be used as an eight output
demultiplexer by using one of the active LOW enable inputs as the data input and the
remaining enable inputs as strobes. Inputs include clamp diodes. This enables the use of
current limiting resistors to interface inputs to voltages in excess of V
CC
.
2. Features and benefits
Complies with JEDEC standard no. 7A
Input levels:
For 74HC138: CMOS level
For 74HCT138: TTL level
Demultiplexing capability
Multiple input enable for easy expansion
Ideal for memory chip select decoding
Active LOW mutually exclusive outputs
ESD protection:
HBM JESD22-A114F exceeds 2000 V
MM JESD22-A115-A exceeds 200 V
Multiple package options
Specified from 40 Cto+85C and from 40 Cto+125C
3. Ordering information
74HC138; 74HCT138
3-to-8 line decoder/demultiplexer; inverting
Rev. 5 — 26 January 2015 Product data sheet
Table 1. Ordering information
Type number Package
Temperature range Name Description Version
74HC138N 40 Cto+125C DIP16 plastic dual in-line package; 16 leads (300 mil) SOT38-4
74HCT138N
74HC138D 40 Cto+125C SO16 plastic small outline package; 16 leads;
body width 3.9 mm
SOT109-1
74 HCT138D
74HC138DB 40 Cto+125C SSOP16 plastic shrink small outline package; 16 leads;
body width 5.3 mm
SOT338-1
74HCT138DB
74HC_HCT138 All information provided in this document is subject to legal disclaimers. © NXP Semiconductors N.V. 2015. All rights reserved.
Product data sheet Rev. 5 — 26 January 2015 2 of 19
NXP Semiconductors
74HC138; 74HCT138
3-to-8 line decoder/demultiplexer; inverting
4. Functional diagram
74HC138PW 40 Cto+125C TSSOP16 plastic thin shrink small outline package;
16 leads; body width 4.4 mm
SOT403-1
74HCT138PW
74HC138BQ 40 Cto+125C DHVQFN16 plastic dual in-line compatible thermal enhanced
very thin quad flat package; no leads;
16 terminals; body 2.5 3.5 0.85 mm
SOT763-1
74HCT138BQ
Table 1. Ordering information
…continued
Type number Package
Temperature range Name Description Version
Fig 1. Logic symbol Fig 2. Functional diagram
<
<
<
<
<
<
<
<





$
$
$
(
(
(
PQD
PQD
(1$%/(
(;,7,1*
<
<
<
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$
$
$
WR
'(&2'(5
(
(
(
Fig 3. Logic diagram
DDH
<
<
(
(
(
$
$
$
<
<
<
<
<
<
74HC_HCT138 All information provided in this document is subject to legal disclaimers. © NXP Semiconductors N.V. 2015. All rights reserved.
Product data sheet Rev. 5 — 26 January 2015 3 of 19
NXP Semiconductors
74HC138; 74HCT138
3-to-8 line decoder/demultiplexer; inverting
5. Pinning information
5.1 Pinning
5.2 Pin description
(1) This is not a supply pin. The substrate is attached to this
pad using conductive die attach material. There is no
electrical or mechanical requirement to solder this pad.
However, if it is soldered, the solder land should remain
floating or be connected to GND.
Fig 4. Pin configuration DIP16, SO16, SSOP16 and
TSSOP16
Fig 5. Pin configuration DHVQFN16
+&
+&7
$ 9
&&
$ <
$ <
( <
( <
( <
< <
*1' <
DDH







DDH
+&%4
+&7%4
< <
( <
( <
( <
$ <
$ <
*1'
<
$
9
&&
7UDQVSDUHQWWRSYLHZ







WHUPLQDO
LQGH[DUHD
*1'

Table 2. Pin description
Symbol Pin Description
A0, A1, A2 1, 2, 3 address input A0, A1, A2
E
1, E2 4, 5 enable input E1, E2 (active LOW)
E3 6 enable input E3 (active HIGH)
Y
0, Y1, Y2, Y3, Y4, Y5, Y6, Y7 15, 14, 13, 12, 11, 10, 9, 7 output Y0, Y1, Y2, Y3, Y4, Y5, Y6, Y7 (active LOW)
GND 8 ground (0 V)
V
CC
16 positive supply voltage

74HC138N,652

Mfr. #:
Manufacturer:
NXP Semiconductors
Description:
Encoders, Decoders, Multiplexers & Demultiplexers 3-8 LINE DCOD/DMUX
Lifecycle:
New from this manufacturer.
Delivery:
DHL FedEx Ups TNT EMS
Payment:
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