CAT4016, CAV4016
www.onsemi.com
4
Table 4. TIMING CHARACTERISTICS
(For 3.0 V ≤ V
DD
≤ 5.5 V, T
AMB
= 25°C, unless specified otherwise.)
Symbol
Name Conditions
Min
(Note 1)
Typ
(Note 2)
Max
(Note 1)
Units
CLK
f
clk
CLK Clock Frequency 25 MHz
t
cwh
CLK Pulse Width High 20 ns
t
cwl
CLK Pulse Width Low 20 ns
SIN
t
ssu
Setup time SIN to CLK 4 ns
t
sh
Hold time SIN to CLK 4 ns
LATCH
t
lwh
LATCH Pulse width 20 ns
T
lh
Hold time LATCH to CLK 4 ns
T
lsu
Setup time LATCH to CLK Channel Stagger Delay 800 ns
LEDn
t
ld
LED1 Propagation delay LATCH to LED1 on
LATCH to LED1 off
40
−
300
1000
ns
t
ls
LED Propagation delay stagger LED(n) to LED(n+1) 17 40 ns
t
lst
LED Propagation delay stagger total LED1 to LED16 250 ns
t
bd
BLANK Propagation delay BLANK to LED(n) on
BLANK to LED(n) off
60
−
300
800
ns
t
lr
LED rise time (10% to 90%)
Pull−up resistor = 50 W to 3.0 V
40 200 ns
t
lf
LED fall time (90% to 10%)
Pull−up resistor = 50 W to 3.0 V
30 250 ns
SOUT
t
or
SOUT rise time (10% to 90%) C
L
= 15 pF 5 ns
t
of
SOUT fall time (90% to 10%) C
L
= 15 pF 5 ns
t
od
Propagation delay time SOUT CLK to SOUT 8 15 25 ns
1. All min and max values are guaranteed by design.
2. V
DD
= 5 V, LED current 30 mA.
Figure 2. Test Circuit for AC Characteristics
LED1
VDD
VDD
1 mF
BLANK
LATCH
CONTROLLER
SIN
CLK
GND
CAT4016
LED16
SOUT
RSET
RSET
15 pF
Cl
V1
3 V
Rp
50 W
Rp
50 W
