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ADL5321-EVALZ

P1-P3P4-P6P7-P9P10-P12P13-P15P16-P17
Data Sheet ADL5321
Figure 16. OIP3 Distribution at 2.6 GHz
Figure 17. P1dB Distribution at 2.6 GHz
Figure 18. Gain Distribution at 2.6 GHz
Figure 19. Noise Figure (NF) Distribution at 2.6 GHz
Figure 20. Supply Current vs. Temperature and Supply Voltage
(Using 2.6 GHz Matching Components)
Figure 21. Supply Current vs. P
OUT
3.3 V and 5 V
(2.6 GHz Matching Components)
30
25
20
15
10
5
0
07307-015
PERCENTAGE (%)
OIP3 (dBM)
39.4
39.8
40.2
40.6
42.2
42.6
41.0
41.4
41.8
39.6
40.0
40.4
40.8
42.4
41.2
41.6
42.0
35
30
25
20
15
10
5
0
07307-016
PERCENTAGE (%)
P1dB (dBM)
24.6
25.0
25.4
25.8
27.0
26.2
26.6
24.8
25.2
25.6
26.0
26.4
26.8
35
30
25
20
15
10
5
0
07307-017
PERCENTAGE (%)
GAIN (dB)
13.70
13.80
13.90
14.00
14.25
14.10
14.15
13.75
13.85
13.95
14.05
14.20
30
25
20
15
10
5
0
07307-018
PERCENTAGE (%)
NF (dB)
3.76
3.84
3.92
4.00
4.08
3.80
3.88
3.96
4.04 4.12
4.16
110
105
100
95
90
85
80
75
70
07307-019
SUPPLY CURRENT (mA)
TEMPERATURE (°C)
–40 –30 –20 –10 0 10 20 30 40 50
60 70 80
5.25V
5.0V
4.75V
220
20
–6 28
SUPPLY CUURENT (mA)
P
OUT
(dBm)
40
60
80
100
120
140
160
180
200
–4 –2 0 2 4 6 8 10 12 14 16 18 20 22 24 26
5V
3.3V
07307-120
Rev. D | Page 9 of 16
ADL5321 Data Sheet
HIGH TEMPERATURE AND 3.3 V OPERATION
The ADL5321 has excellent performance at temperatures above 85°C. At 105°C, the gain and P1dB decrease by 0.2 dB, the OIP3 decreases by
0.1 dB, and the noise figure increases by 0.31 dB compared with the data at 85°C. Figure 25 through Figure 27 show the performance at 105°C.
Figure 22. Gain vs. Frequency and Temperature, 5 V Supply, 2.5 GHz to 2.7 GHz
Figure 23. OIP3 and P1dB vs. Frequency and Temperature,
5 V Supply, 2.5 GHz to 2.7 GHz
Figure 24. Noise Figure vs. Frequency and Temperature,
5 V Supply, 2.5 GHz to 2.7 GHz
Figure 25. Gain vs. Frequency and Temperature, 3.3 V Supply, 2.5 GHz to 2.7 GHz
Figure 26. OIP3 and P1dB vs. Frequency and Temperature,
3.3 V Supply, 2.5 GHz to 2.7 GHz
Figure 27. Noise Figure vs. Frequency and Temperature,
3.3 V Supply 2.5 GHz to 2.7 GHz
16.0
15.5
15.0
14.5
14.0
13.5
13.0
12.5
12.0
11.5
2.500
2.700
2.675
2.650
2.625
2.6002.575
2.5502.525
GAIN (dB)
FREQUENCY (GHz)
07307-030
25°C
85°C
105°C
42
41
40
39
38
37
36
35
34
32
31
30
29
28
27
26
25
24
2.500 2.7002.6752.6502.6252.6002.5752.5502.525
OIP3 (dBm)
P1dB (dBm)
FREQUENCY (GHz)
07307-031
25°C
85°C
105°C
OIP3
P1dB
5.5
5.0
4.5
4.0
3.5
3.0
2.50 2.702.652.602.55
NOISE FIGURE (dB)
FREQUENCY (GHz)
07307-032
25°C
85°C
105°C
15.0
10.0
2.500 2.525 2.7002.6752.6502.6252.6002.5752.555
GAIN (dB)
FREQUENCY (GHz)
10.5
11.0
11.5
12.0
12.5
13.0
13.5
14.0
14.5
25°C
85°C
105°C
–40°C
07307-130
33
26
2.500 2.525 2.7002.6752.6502.6252.6002.5752.555
OIP3 (dBm)
P1dB (dBm)
FREQUENCY (GHz)
27
28
29
30
31
32
27
20
21
22
23
24
25
26
P
1
d
B (
25
°
C)
P1
dB (
–40°C)
P1d
B (+
105°C)
P
1dB (
+85°
C)
OI
P
3 (
+25
°
C)
O
I
P
3
(–40
°
C)
O
I
P3
(+
85
°C)
O
I
P
3 (
+
105
°
C)
07307-131
7
5
6
4
3
2
1
2.2 2.92.5 2.6 2.82.72.42.3
NOISE FIGURE (dB)
FREQUENCY (GHz)
85°C
105°C
25°C
–40°C
07307-132
Rev. D | Page 10 of 16
Data Sheet ADL5321
BASIC LAYOUT CONNECTIONS
The basic connections for operating the ADL5321 are shown
in Figure 28.
Tabl e 6 lists the required matching components. Capacitors
C1, C2, C3, C4, and C7 are Murata GRM155 series (0402 size)
and Inductor L1 is a Coilcraft 0603CS series (0603 size). For all
frequency bands, the placement of C3 and C7 is critical. From
2500 MHz to 2700 MHz, the placement of C1 is also important.
Tabl e 7 lists the recommended component placement for
various frequencies.
A 5 V dc bias is supplied through L1 that is connected to RFOUT
(Pin 3). In addition to C4, 10 nF and 10 μF power supply
decoupling capacitors are also required. The typical current
consumption for the ADL5321 is 90 mA.
Figure 28. Basic Connections
SOLDERING INFORMATION AND RECOMMENDED
PCB LAND PATTERN
Figure 29 shows the recommended land pattern for the ADL5321.
To minimize thermal impedance, the exposed paddle on the
SOT-89 package underside is soldered down to a ground plane
along with (GND) Pin 2. If multiple ground layers exist, they
should be stitched together using vias. For more information on
land pattern design and layout, refer to the AN-772 Application
Note, A Design and Manufacturing Guide for the Lead Frame
Chip Scale Package (LFCSP).
This land pattern, on the ADL5321 evaluation board, provides
a measured thermal resistance (θ
JA
) of 35°C/W. To measure θ
JA
,
the temperature at the top of the SOT-89 package is found with
an IR temperature gun. Thermal simulation suggests a junction
temperature 10°C higher than the top of package temperature.
With additional ambient temperature and I/O power measure-
ments, θ
JA
could be determined.
Figure 29. Recommended Land Pattern
Table 6. Recommended Components for Basic Connections
Frequency (MHz) C1 (pF) C2 (pF) C3 (pF) C4 (pF) C7 (pF) L1 (nH)
2500 to 2700 1.0 10 1.2 10 Open 9.5
3400 to 3850 10 10 1.2 10 1.0 9.5
Table 7. Matching Component Spacing
Frequency (MHz) λ1 (mils) λ2 (mils) λ3 (mils) λ4 (mils)
2500 to 2700 240 75 89 325
3400 to 3850 90 35 40 416
RFIN
GND
GND
RFOUT
1
2
(2)
3
ADL5321
C6 10µF
C5 10nF
C4
1
L1
1
VCC
GND
RF
IN
C2
1
C3
1
RF
OUT
C1
1
C7
1
λ
1
2
λ
3
2
λ
4
2
λ
2
2
1
SEE TABLE 5 FOR FREQUENCY SPECIFIC COMPONENTS.
2
SEE TABLE 6 FOR RECOMMENDED COMPONENT SPACING.
07307-026
0.86mm
5.37mm
0.20mm
0.762mm
1.80mm
0.86mm
0.635mm
1.27mm
0.62mm
3.48mm
1.50mm
3.00mm
07307-051
Rev. D | Page 11 of 16
P1-P3P4-P6P7-P9P10-P12P13-P15P16-P17

ADL5321-EVALZ

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Manufacturer:
Analog Devices Inc.
Description:
Amplifier IC Development Tools ADL5321 Evaluation Board
Lifecycle:
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