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LT1227CS8#PBF

P1-P3P4-P6P7-P9P10-P12
7
LT1227
W
I
SPL
II
F
ED S
W
A
CH
E
TI
C
U
S
A
O
PP
L
IC
AT
I
WU
U
I FOR ATIO
The LT1227 is a very fast current feedback amplifier.
Because it is a current feedback amplifier, the bandwidth
is maintained over a wide range of voltage gains. The
amplifier is designed to drive low impedance loads such as
cables with excellent linearity at high frequencies.
Feedback Resistor Selection
The small-signal bandwidth of the LT1227 is set by the
external feedback resistors and the internal junction ca-
pacitors. As a result, the bandwidth is a function of the
supply voltage, the value of the feedback resistor, the
closed-loop gain and load resistor. The characteristic
curves of Bandwidth vs Supply Voltage show the effect of
a heavy load (100Ω) and a light load (1k). These curves
use a solid line when the response has less than 0.5dB of
peaking and a dashed line when the response has 0.5dB to
5dB of peaking. The curves stop where the response has
more than 5dB of peaking.
At a gain of two, on ±15V supplies with a 1k feedback
resistor, the bandwidth into a light load is over 140MHz,
but into a heavy load the bandwidth reduces to 120MHz.
The loading has this effect because there is a mild reso-
nance in the output stage that enhances the bandwidth at
light loads but has its Q reduced by the heavy load. This
enhancement is only useful at low gain settlings; at a gain
of ten it does not boost the bandwidth. At unity gain, the
enhancement is so effective the value of the feedback
resistor has very little effect. At very high closed-loop
gains, the bandwidth is limited by the gain bandwidth
product of about 1GHz. The curves show that the band-
width at a closed-loop gain of 100 is 12MHz, only one tenth
what it is at a gain of two.
NULL
NULL
6
V
OUT
4
V
–
7
V
+
2
–IN
+IN
3
CURRENT
SOURCE
BIAS
8
S/D
14k
1 5
1227 SS
8
LT1227
U
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L
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I FOR ATIO
R
F
= 1k, R
G
= 1k, R
L
= 100Ω
V
OUT
Small-Signal Rise Time, A
V
= +2
and inverting input bias current will change. The offset
voltage changes about 500µV per volt of supply mis-
match. The inverting bias current can change as much as
5.0µA per volt of supply mismatch, though typically the
change is less than 0.5µA per volt.
Slew Rate
The slew rate of a current feedback amplifier is not
independent of the amplifier gain configuration the way
slew rate is in a traditional op amp. This is because both the
input stage and the output stage have slew rate limitations.
In the inverting mode, and for higher gains in the
noninverting mode, the signal amplitude between the
input pins is small and the overall slew rate is that of the
output stage. For gains less than ten in the noninverting
mode, the overall slew rate is limited by the input stage.
The input stage slew rate of the LT1227 is approximately
125V/µs and is set by internal currents and capacitances.
The output slew rate is set by the value of the feedback
resistors and the internal capacitances. At a gain of ten
with a 1k feedback resistor and ±15V supplies, the output
slew rate is typically 1100V/µs. Larger feedback resistors
will reduce the slew rate as will lower supply voltages,
similar to the way the bandwidth is reduced.
The graph of Maximum Undistorted Output vs Frequency
relates the slew rate limitations to sinusoidal inputs for
various gain configurations.
AI01
V
OUT
R
F
= 910Ω, R
G
= 100Ω, R
L
= 400Ω
Large-Signal Transient Response, A
V
= +10
AI02
Capacitance on the Inverting Input
Current feedback amplifiers require resistive feedback
from the output to the inverting input for stable operation.
Take care to minimize the stray capacitance between the
output and the inverting input. Capacitance on the invert-
ing input to ground will cause peaking in the frequency
response (and overshoot in the transient response), but it
does not degrade the stability of the amplifier.
Capacitive Loads
The LT1227 can drive capacitive loads directly when the
proper value of feedback resistor is used. The graph of
Maximum Capacitive Load vs Feedback Resistor should
be used to select the appropriate value. The value shown
is for 5dB peaking when driving a 1k load at a gain of 2. This
is a worst case condition, the amplifier is more stable at
higher gains and driving heavier loads. Alternatively, a
small resistor (10Ω to 20Ω) can be put in series with the
output to isolate the capacitive load from the amplifier
output. This has the advantage that the amplifier band-
width is only reduced when the capacitive load is present
and the disadvantage that the gain is a function of the load
resistance.
Power Supplies
The LT1227 will operate from single or split supplies from
±2V (4V total) to ±15V (30V total). It is not necessary to
use equal value split supplies, however the offset voltage
9
LT1227
U
S
A
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L
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U
I FOR ATIO
V
OUT
AI04
Settling Time
The characteristic curves show that the LT1227 amplifier
settles to within 10mV of final value in 40ns to 55ns for any
output step up to 10V. The curve of settling to 1mV of final
value shows that there is a slower thermal contribution up
to 20µs. The thermal settling component comes from the
output and the input stage. The output contributes just
under 1mV per volt of output change and the input
contributes 300µV per volt of input change. Fortunately
the input thermal tends to cancel the output thermal. For
this reason the noninverting gain of two configuration
settles faster than the inverting gain of one.
Large-Signal Transient Response, A
V
= –2
V
OUT
AI04
Large-Signal Transient Response, A
V
= +2
Shutdown
The LT1227 has a high impedance, low supply current
mode which is controlled by Pin 8. In the shutdown mode,
the output looks like a 12pF capacitor and the supply
current drops to approximately the Pin 8 current. The
shutdown pin is referenced to the positive supply through
an internal pullup circuit (see the simplified schematic).
Pulling a current of greater than 50µA from Pin 8 will put
the device into the shutdown mode. An easy way to force
shutdown is to ground Pin 8, using open drain (collector)
logic. Because the pin is referenced to the positive supply,
the logic used should have a breakdown voltage of greater
than the positive supply voltage. No other circuitry is
necessary as an internal JFET limits the Pin 8 current to
about 100µA. When Pin 8 is open, the LT1227 operates
normally.
Differential Input Signal Swing
The differential input swing is limited to about ±6V by an
ESD protection device connected between the inputs. In
normal operation, the differential voltage between the
input pins is small, so this clamp has no effect; however,
in the shutdown mode, the differential swing can be the
same as the input swing. The clamp voltage will then set
the maximum allowable input voltage. To allow for some
margin, it is recommended that the input signal be less
than ±5V when the device is shutdown.
Offset Adjust
Pins 1 and 5 are provided for offset nulling. A small current
to V
+
or ground will compensate for DC offsets in the
device. The pins are referenced to the positive supply (see
the simplified schematic) and should be left open if un-
used. The offset adjust pins act primarily on the inverting
input bias current. A 10k pot connected to Pins 1 and 5
with the wiper connected to V
+
will null out the bias
current, but will not affect the offset voltage much. Since
the output offset is
V
O
≅ A
V
• V
OS
+ (I
IN
–) • R
F
at higher gains (A
V
> 5), the V
OS
term will dominate. To null
out the V
OS
term, use a 10k pot between Pins 1 and 5 with
a 150k resistor from the wiper to ground for 15V split
supplies, 47k for 5V split supplies.
AI03
R
F
= 1k, R
G
= 1k, R
L
= 400Ω
R
F
= 1k, R
G
= 510Ω, R
L
= 400Ω
P1-P3P4-P6P7-P9P10-P12

LT1227CS8#PBF

Mfr. #:
Buy LT1227CS8#PBF
Manufacturer:
Analog Devices Inc.
Description:
High Speed Operational Amplifiers 140MHz Video C F Amp
Lifecycle:
New from this manufacturer.
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