June 21, 2013 | FINAL | V1.09
Digital Multi-Phase Buck Controller
FEATURES
6-phase & 8-phase dual output PWM Controller
Phases are flexibly assigned between Loops 1 & 2
Intel® VR12, AMD® 3.4MHz SVI/PVI & Memory
modes
Overclocking & Gaming Mode with Vmax setting
Switching frequency from 200kHz to 1.2MHz per
phase
IR Efficiency Shaping Features including Variable
Gate Drive and Dynamic Phase Control
Programmable 1-phase or 2-phase for Light Loads
and Active Diode Emulation for Very Light Loads
IR Adaptive Transient Algorithm (ATA) on both loops
minimizes output bulk capacitors and system cost
Auto-Phase Detection with auto-compensation
Per-Loop Fault Protection: OVP, UVP, OCP, OTP, CFP
I2C/SMBus/PMBus system interface for telemetry
of Temperature, Voltage, Current & Power for
both loops
Non-Volatile Memory (NVM) for custom
configuration
Compatible with IR ATL and 3.3V Tri-state Drivers
+3.3V supply voltage; -20ºC to 85ºC ambient
operation
Pb-Free, RoHS, 7x7 48-pin & 8x8 56-pin QFN, MSL2
package
APPLICATIONS
Intel ® VR12 & AMD® SVI & PVI based systems
DDR Memory with Vtt tracking
Overclocked & Gaming platforms
PIN DIAGRAM
49 GND
CHL8326
48 Pin 7x7 QFN
Top View
1
2
7
8
5
6
3
4
10
9
12
11
36
35
30
29
32
31
34
33
27
28
25
26
47 4345 4046 4244 394148 38 37
14 1816 2115 1917 222013 23 24
SMB_DIO
PWM5
ISEN6
ENABLE
VRTN
RCSM
ISEN5
ISEN4
ISEN3
PWM6
VSEN
SMB_CLK
PWM4
VR_READY
1
/
PWRGD
2
IRTN3
IRTN4
IRTN6
IRTN5
RCSP
TSEN
VR_HOT#
1
/
VRHOT_ICRIT#
2
PWM3
VINSEN
SMB_ALERT#
V18A
RRES
VCC
ISEN2
ISEN1
IRTN1
IRTN2
PWM2
PWM1
GPO_A
1
/ CBOUT
2
RCSM_L2
RCSP_L2
SV_ADDR_GPO_D
1
/ VID[1]
2
CFP
1
/
VFIXEN_PSI
2
PM_ADDR_GPO_C
1
/
PM_ADDR_VID[0]
2
SV_DIO
1
/ SVD_VID[2]
2
SV_CLK
1
/ SVC_VID[3]
2
SV_ALERT
1
/ VID[4]
2
VR_READY_L2
1
/ PWROK
2
VCC
PSI
1
/ VID[5]
2
VAR_GATE
VRTN_L2
VSEN_L2
Figure 1: IR3536/CHL8326 Package Top View
DESCRIPTION
The IR3536/CHL8326 and IR3538/CHL8328 are dual-loop
digital multi-phase buck controllers. The IR3536/CHL8326
drive up to 6 phases and the IR3538/CHL8328 drives up to
8 phases. The IR3536/CHL8326 and IR3538/CHL8328 are
fully Intel® VR12 and AMD® SVI/PVI compliant on both
loops and provide a Vtt tracking function for DDR memory.
The IR3536/CHL8326 and IR3538/CHL8328 include the
IR Efficiency Shaping Technology to deliver exceptional
efficiency at minimum cost across the entire load range.
IR Variable Gate Drive optimizes the MOSFET gate drive
voltage based on real-time load current. IR Dynamic Phase
Control adds/drops phases based upon load current.
The IR3536/CHL8326 and IR3538/CHL8328 can be
configured to enter 1-phase operation and active diode
emulation mode automatically or by command.
IR’s unique Adaptive Transient Algorithm (ATA), based on
proprietary non-linear digital PWM algorithms, minimizes
output bulk capacitors.
The I2C/PMBus interface can communicate with up to 16
IR3536/CHL8326 and IR3538/CHL8328 based VR loops.
Device configuration and fault parameters are easily
defined using the IR Intuitive Power Designer (DPDC) GUI
and stored in on-chip NVM.
The IR3536/CHL8326 and IR3538/CHL8328 provides
extensive OVP, UVP, OCP and OTP fault protection and
includes thermistor based temperature sensing with
VR_HOT signal.
NVM storage saves pins and enables a small package size.
The IR3536/CHL8326 and IR3538/CHL8328 also include
numerous features like register diagnostics for fast design
cycles and platform differentiation, truly simplifying
VRD design and enabling fastest time-to-market with its
“set-and-forget” methodology.
SMB_DIO
PWM5
ISEN6
ENABLE
VRTN
RCSM
ISEN5
ISEN4
ISEN3
PWM6
VSEN
SMB_CLK
PWM4
VR_READY
1
/
PWRGD
2
IRTN3
IRTN4
IRTN6
IRTN5
RCSP
TSEN
VR_HOT#
1
/
VRHOT_ICRIT#
2
PWM3
VINSEN
SMB_ALERT#
V18A
RRES
VCC
ISEN2
ISEN1
IRTN1
IRTN2
PWM2
PWM1
GPO_A
1
/ CBOUT
2
RCSM_L2
RCSP_L2
SV_ADDR_GPO_D
1
/ VID[1]
2
CFP
1
/
VFIXEN_PSI
2
PM_ADDR_GPO_C
1
/
PM_ADDR_VID[0]
2
SV_DIO
1
/ SVD_VID[2]
2
SV_CLK
1
/ SVC_VID[3]
2
SV_ALERT
1
/ VID[4]
2
VR_READY_L2
1
/ PWROK
2
VCC
PSI(MPoL)
1
/ VID[5]
2
PWM7
VRTN_L2
VSEN_L2
57 GND
CHL8328
56 Pin 8x8 QFN
Top View
55 5153 4854 5052 474956 46 45 4344
1
2
7
8
5
6
3
4
10
9
12
11
14
13
16 2018 2317 2119 242215 25 26 2827
42
41
36
35
38
37
40
39
33
34
31
32
29
30
ISEN8
GPO_B
TSEN2
VAR_GATE
PWM8
ISEN7
IRTN7
IRTN8
1
Intel/MPoL mode
2
AMD mode
Figure 2: IR3538/CHL8328 Package Top View
