7 www.fairchildsemi.com
74VHC4046
Typical Performance Characteristics (Continued)
VHC4046 VCO
OUT
vs
Temperature V
CC
= 4.5V
VHC4046 VCO
OUT
vs
Temperature V
CC
= 6V
VHC4046 Typical Source Follower
Power Dissipation vs RS
Typical f
MAX
/f
MIN
vs R
2
/R
1
V
CC
= 4.5V & 6V f
MAX
/f
MIN
www.fairchildsemi.com 8
74VHC4046
Typical Performance Characteristics (Continued)
VHC4046 Typical VCO Linearity vs R
1
& C
1
VHC4046 Typical VCO Linearity vs R
1
& C
1
VCO WITHOUT OFFSET
R
2
=
VCO WITH OFFSET
Comparator I Comparator II & III
R
2
=∞ R
2
≠∞ R
2
=∞ R
2
≠∞
Given: f
O
Given: f
O
and f
L
Given: f
MAX
Given: f
MIN
and f
MAX
Use f
O
with curve titled Calculate f
MIN
from the Calculate f
O
from the Use f
MIN
with curve titled
center frequency vs R
1
, C equation f
MIN
= f
O
f
L
equation f
O
= f
MAX
/2 offset frequency vs R
2
,
to determine R
1
and C
1
Use f
MIN
with curve titled Use f
O
with curve titled C to determine R
2
and C
1
offset frequency vs R
2
, C center frequency vs R
1
, C Calculate f
MAX
/f
MIN
to determine R
2
and C
1
to determine R
1
and C
1
Use f
MAX
/f
MIN
with curve
Calculate f
MAX
/f
MIN
from titled f
MAX
/f
MIN
vs R
2
/R
1
the equation f
MAX
/f
MIN
= to determine ratio R
2
/R
1
f
O
+ f
L
/f
O
f
L
to obtain R
1
Use f
MAX
/f
MIN
with curve
titled f
MAX
/f
MIN
vs R
2
/R
1
to determine ratio R
2
/R
1
to obtain R
1
9 www.fairchildsemi.com
74VHC4046
Detailed Circuit Description
VOLTAGE CONTROLLED OSCILLATOR/SOURCE
FOLLOWER
The VCO requires two or three external components to
operate. These are R
1
, R
2
, C
1
. Resistor R
1
and capacitor
C
1
are selected to determine the center frequency of the
VCO. R
1
controls the lock range. As R1s resistance
decreases the range of f
MIN
to f
MAX
increases. Thus the
VCOs gain increases. As C
1
is changed the offset (if used)
of R
2
, and the center frequency is changed. (See typical
performance curves) R
2
can be used to set the offset fre-
quency with 0V at VCO input. If R
2
is omitted the VCO
range is from 0Hz. As R
2
is decreased the offset frequency
is increased. The effect of R
2
is shown in the design infor-
mation table and typical performance curves. By increasing
the value of R
2
the lock range of the PLL is offset above
0Hz and the gain (Hz/Volt) does not change. In general,
when offset is desired, R
2
and C
1
should be chosen first,
and then R
1
should be chosen to obtain the proper center
frequency.
FIGURE 1. Logic Diagram for VCO
Internally the resistors set a current in a current mirror as
shown in Figure 1. The mirrored current drives one side of
the capacitor once the capacitor charges up to the thresh-
old of the Schmitt Trigger the oscillator logic flips the
capacitor over and causes the mirror to charge the oppo-
site side of the capacitor. The output from the internal logic
is then taken to pin 4.
The input to the VCO is a very high impedance CMOS
input and so it will not load down the loop filter, easing the
filters design. In order to make signals at the VCO input
accessible without degrading the loop performance a
source follower transistor is provided. This transistor can
be used by connecting a resistor to ground and its drain
output will follow the VCO input signal.
An inhibit signal is provided to allow disabling of the VCO
and the source follower. This is useful if the internal VCO is
not being used. A logic high on inhibit disables the VCO
and source follower.
The output of the VCO is a standard high speed CMOS
output with an equivalent LSTTL fanout of 10. The VCO
output is approximately a square wave. This output can
either directly feed the comparator input of the phase com-
parators or feed external prescalers (counters) to enable
frequency synthesis.
PHASE COMPARATORS
All three phase comparators share two inputs, Signal In
and Comparator In. The Signal In has a special DC bias
network that enables AC coupling of input signals. If the
signals are not AC coupled then this input requires logic
levels the same as standard 74VHC. The Comparator input
is a standard digital input. Both input structures are shown
in Figure 2.
The outputs of these comparators are essentially standard
74VHC voltage outputs. (Comparator II is 3-STATE.)

74VHC4046MTCX

Mfr. #:
Manufacturer:
ON Semiconductor / Fairchild
Description:
Phase Locked Loops - PLL CMOS Phase-Lock Loop
Lifecycle:
New from this manufacturer.
Delivery:
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