LTC4062
10
4062fb
OPERATIO
U
is being used). This feature eliminates the need for peri-
odic charge cycle initiations and ensures that the battery
is always fully charged. Automatic recharge is disabled in
user termination mode.
Thermal Regulation
An internal thermal feedback loop reduces the programmed
charge current if the die temperature attempts to rise
above a preset value of approximately 105°C. This feature
protects the LTC4062 from excessive temperature and
allows the user to push the limits of the power handling
capability of a given circuit board without risk of damaging
the LTC4062. The charge current can be set according to
typical (not worst-case) ambient temperatures with the
assurance that the charger will automatically reduce the
current in worst-case conditions.
Undervoltage Lockout (UVLO)
An internal undervoltage lockout circuit monitors the input
voltage and keeps the charger in shutdown mode until V
CC
rises above the undervoltage lockout threshold (3.8V).
The UVLO circuit has a built-in hysteresis of 200mV.
Furthermore, to protect against reverse current in the
power MOSFET, the UVLO circuit keeps the charger in
shutdown mode if V
CC
falls to less than 45mV above the
battery voltage. Hysteresis of 145mV prevents the charger
from cycling in and out of shutdown.
Manual Shutdown
At any point in the charge cycle, the charger can be put into
shutdown mode by pulling the EN pin high. This reduces
the supply current to less than 50µA and the battery drain
current of the charger to less than 2µA. A new charge cycle
can be initiated by floating the EN pin or pulling it low.
If shutdown is not required, leaving the pin disconnected
continuously enables the circuit.
Trickle-Charge and Defective Battery Detection
When the BAT pin voltage is below the 2.9V trickle charge
threshold (V
TRIKL
), the charger reduces the charge current
to 10% of the programmed value. If the battery remains in
trickle charge for more than 25% of the total programmed
charge time, the charger stops charging and enters a
FAULT state, indicating that the battery is defective
1
. The
LTC4062 indicates the FAULT state by driving the CHRG
open-drain output with a square wave. The duty cycle of
this oscillation is 50% and the frequency is set by C
TIMER
:
f
F
C
Hz
CHRG
TIMER
=•
01
6
. µ
A LED driven by the CHRG output exhibits a pulsing
pattern, indicating to the user that the battery needs
replacing. To exit the FAULT state, the charger must be
restarted either by toggling the EN input or removing and
reapplying power to V
CC
.
Charge Status Output (CHRG)
The charge status indicator pin has three states: pull-
down, pulse at 6Hz and high impedance. In the pull-down
state, an NMOS transistor pulls down on the CHRG pin
capable of sinking up to 10mA. A pull-down state indicates
that the LTC4062 is charging a battery and the charge
current is greater than I
DETECT
(which is set by the external
component R
DET
). A high impedance state indicates that
the charge current has dropped below I
DETECT
. In the case
where the I
DET
pin is left unconnected (R
DET
= ∞, I
DETECT
= 0), a high impedance state on CHRG indicates that the
LTC4062 is not charging.
1
The Defective Battery Detection Feature is only available when time termination is being used.
