NCV4264D50R2G

NCV4264
http://onsemi.com
7
TYPICAL CHARACTERISTIC CURVES -- 3.3 V Version
Figure 13. ESR Stability vs. Output Current
(3.3 V Version)
Figure 14. Output Current vs. Input Voltage
(3.3 V Version)
OUTPUT CURRENT (mA) INPUT VOLTAGE (V)
1501209060300
0
5
10
15
20
40352520151050
0
30
60
90
120
150
180
Figure 15. Input Voltage vs. Quiescent Current
(3.3 V Version)
Figure 16. Quiescent Current vs. Output
Current (3.3 V Version)
INPUT VOLTAGE (V) OUTPUT CURRENT (mA)
40353020151050
0
1.0
2.0
4.0
5.0
6.0
7.0
8.0
1501251007550250
0
1.0
2.0
3.0
6.0
7.0
9.0
10
Figure 17. Output Voltage vs. Temperature
(3.3 V Version)
Figure 18. Quiescent Current vs. Temperature
(3.3 V Version)
TEMPERATURE (°C) TEMPERATURE (°C)
1251007550250-- 2 5-- 5 0
3.234
3.245
3.256
3.267
3.300
3.311
3.333
3.344
1501007550250-- 2 5-- 5 0
0.10
0.11
0.12
0.13
0.15
0.16
0.18
0.19
ESR (Ω)
OUTPUT CURRENT (mA)
QUIESCENT CURRENT (mA)
QUIESCENT CURRENT (mA)
OUTPUT VOLTAGE (V)
QUIESCENT CURRENT (mA)
Stable Region
Unstable Region
C
out
22 mF
V
in
= 13.5 V
30 45
25 45
3.0
R
L
=50Ω
R
L
= 100 Ω
4.0
5.0
8.0
125°C
-- 4 0 °C
25°C
I
out
=5mA
150
3.278
3.289
3.322
125
0.14
0.17
V
in
= 13.5 V
I
out
=5mA
NCV4264
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8
TYPICAL CHARACTERISTIC CURVES -- 3.3 V Version
Figure 19. Power Supply Rejection Ratio
(3.3 V Version)
Figure 20. Power Supply Rejection Ratio
(3.3 V Version)
100 k10 k1k10010
0
10
30
40
50
70
90
MAG (dB)
20
60
80
100 k10 k1k10010
0
10
30
40
50
70
90
MAG (dB)
20
60
80
I
out
= 150 mA
V
in
= 13.5 V
T
A
=25°C
C
out
=22mF
I
out
=5mA
V
in
= 13.5 V
T
A
=25°C
C
out
=22mF
NCV4264
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9
Circuit Description
The NCV4264 is a precision trimmed 5.0 V a nd 3.3 V
fixed output regulator. The device has current capability of
100 mA, with 500 mV of dropout voltage at 100 mA of
current. The regulation is provided by a PNP pass transistor
controlled by an error amplifier with a bandgap refere nce.
The regulator is protected by both current limit and short
circuit prot ection. Thermal shutdown occurs above 150°C
to protect the IC during overloads and extreme ambient
temperatures.
Regulator
The e rror amplifier compares the reference voltage to a
sample of the output volta ge (V
out
) and drives the base of
a PNP series pass transistor by a buffer. The reference is a
bandgap design to give it a temperature--stable output.
Saturation control of the PNP is a functi on of the load
current and input voltage. Over saturation of the output
power device is prevented, and quie scent current in the
ground pin is minimized.
Regulator Stability Considerations
The input capacitor C
IN1
in Figure 2 is necessary for
compensating i nput line reactance. Possible oscillations
caused by input inductance and input capacitance can be
damped by using a resistor of approximately 1 Ω in series
with C
IN2
. The output or compensation capacitor, C
OUT
helps determine three main characteristics of a linear
regulator: startup delay, load tra nsient response and loop
stability. The capacitor value and type should be based on
cost, availability, size and temperature constraints.
Tantalum, aluminum electrolytic, film, or ceramic
capacitors are all acceptable solutions, however, attention
must be paid to ESR constraints. The aluminum
ele ctrolytic capacitor is the least expensive solution, but, if
the circuit operates at low temperatures (--25°Cto--40°C),
both the val ue and ESR of the capacitor will vary
considerably. The capacitor manufacturers data sheet
usually provides this information. The value for the output
capacitor C
OUT
shown in Figure 2 should work for most
applications; however, it is not necessarily the optimized
solution. Stability is guaranteed at values of C
Q
10 mF,
with an ESR 9 Ω for the 5.0 V Version, and C
Q
22 mF
with an ESR 16 Ω for the 3.3 V Version within the
operating temperature range. Actual limits are shown in a
graph in the Typical Performance Characteristics section.
Calculating Power Dissipation in a Single Output
Linear Regulator
The maximum power dissipation for a single output
regulator (Figure 3) is:
I
Q(max)
+ V
I(max)
I
q
(eq. 1)
P
D(max)
= [V
IN(max)
V
OUT(min)
]
Where:
V
IN(max)
is the maximum input voltage,
V
OUT(min)
is the minimum output voltage,
I
Q(max)
is the maximum output current for the
application, and I
q
is t he quiescent current the re gulator
consumes at I
Q(max)
.
Once the va lue of P
D(Max)
is known, the maximum
permissible value of R
θ
JA
can be calculated:
P
θJA
=
150
o
C T
A
P
D
(eq. 2)
The value of R
θ
JA
can then be compared with those in the
package section of the data sheet. Those packages with
R
θ
JA
s lessthan the calculated value in Equation 2 will keep
the die temperature below 150°C. In some cases, none of
the packages will be sufficient to dissipate the heat
genera ted by the IC, and an external heat sink will be
required. The current flow and voltages are shown in the
Measurement Circuit Diagram.
Heat Sinks
A heat sink effectively increases the surface area of the
package to improve the flow of heat away from the IC and
into the surrounding air. Each ma terial in the heat flow path
betwee n the IC and the outside environment will have a
thermal resistance. Like series electrical resistances, these
resistances are summed to determine the value of R
θ
JA
:
R
θJA
= R
θJC
+ R
θCS
+ R
θSA
(eq. 3)
Where:
R
θ
JC
= the junction--to--case thermal resistance,
R
θ
CS
= the case -- to--heat sink thermal resistance, and
R
θ
SA
= the heat sink--to --ambient thermal resistance.
R
θ
JA
appears in the package section of the data sheet.
Like R
θ
JA
, it too is a function of package type. R
θ
CS
and
R
θ
SA
are functions of the package type, heat sink and the
interface between them. These values appear in data sheets
of heat sink manufacturers. Thermal, mounti ng, and heat
sinking are discussed in the ON Semiconductor application
note AN1040/D, available on the ON Semiconductor
Website.

NCV4264D50R2G

Mfr. #:
Manufacturer:
ON Semiconductor
Description:
LDO Voltage Regulators 5.0 V, 100 MA LDO
Lifecycle:
New from this manufacturer.
Delivery:
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Payment:
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