7
LTC3700
3700f
FUNCTIONAL DIAGRA
UU
W
V
IN2
SWITCHING
LOGIC AND
BLANKING
CIRCUIT
PGOOD
+
+
0.5µA
0.3V
0.3V
0.15V
OVP
SHORT-CIRCUIT
DETECT
SHDN
1.2V
UV
3700 FD
V
REF
+
60mV
V
REF
0.8V
0.8V
0.74V
V
FB2
V
FB
0.86V
V
IN
RS1
VOLTAGE
REFERENCE
SLOPE
COMP
ICMP
R
S
Q
FREQ
FOLDBACK
OSC
SENSE
V
IN
7
5
4
+
8
+
LDO
V
FB2
43 1
EAMP
V
FB
+
9
PGATE
V
IN
6
LDO
2
I
TH
/RUN
V
IN
0.3V
V
REF
0.8V
10
+
SHDN
CMP
+
BURST
CMP
SLEEP
GND
+
UNDERVOLTAGE
LOCKOUT
OVERTEMPERATURE
DETECT
V
IN2
4
PGOOD
SHDN
V
IN
8
LTC3700
3700f
OPERATIO
U
(Refer to Functional Diagram)
Main Control Loop (Buck Controller)
The LTC3700 is a constant frequency current mode switch-
ing regulator. During normal operation, the external
P-channel power MOSFET is turned on each cycle when
the oscillator sets the RS latch (RS1) and turned off when
the current comparator (ICMP) resets the latch. The peak
inductor current at which ICMP resets the RS latch is
controlled by the voltage on the I
TH
/RUN pin, which is the
output of the error amplifier EAMP. An external resistive
divider connected between V
OUT
and ground allows the
EAMP to receive an output feedback voltage V
FB
. When the
load current increases, it causes a slight decrease in V
FB
relative to the 0.8V reference, which in turn causes the
I
TH
/RUN voltage to increase until the average inductor
current matches the new load current.
The main control loop is shut down by pulling the I
TH
/RUN
pin low. Releasing I
TH
/RUN allows an internal 0.5µA
current source to charge up the external compensation
network. When the I
TH
/RUN pin reaches 0.3V, the main
control loop is enabled with the I
TH
/RUN voltage then
pulled up to its zero current level of approximately 0.7V.
As the external compensation network continues to charge
up, the corre
sponding output current trip level follows,
allowing normal operation.
Comparator OVP guards against transient overshoots
>7.5% by turning off the external P-channel power
MOSFET and keeping it off until the fault is removed.
Burst Mode Operation
The buck enters Burst Mode operation at low load cur-
rents. In this mode, the peak current of the inductor is set
as if V
ITH
/RUN = 1V (at low duty cycles) even though the
voltage at the I
TH
/RUN pin is at a lower value. If the
inductor’s average current is greater than the load require-
ment, the voltage at the I
TH
/RUN pin will drop. When the
I
TH
/RUN voltage goes below 0.85V, the sleep signal goes
high, turning off the external MOSFET. The sleep signal
goes low when the I
TH
/RUN voltage goes above 0.925V
and the buck resumes normal operation. The next oscilla-
tor cycle will turn the external MOSFET on and the switch-
ing cycle repeats.
Dropout Operation
When the input supply voltage decreases towards the
output voltage, the rate of change of inductor current
during the ON cycle decreases. This reduction means that
the external P-channel MOSFET will remain on for more
than one oscillator cycle since the inductor current has not
ramped up to the threshold set by EAMP. Further reduc-
tion in input supply voltage will eventually cause the
P-channel MOSFET to be turned on 100%, i.e., DC. The
output voltage will then be determined by the input voltage
minus the voltage drop across the MOSFET, the sense
resistor and the inductor.
Undervoltage Lockout
To prevent operation of the P-channel MOSFET below safe
input voltage levels, an undervoltage lockout is incorpo-
rated into the buck input supply. When the input supply
voltage drops below approximately 2.1V, the P-channel
MOSFET and all circuitry is turned off except the under-
voltage block, which draws only several microamperes.
Short-Circuit Protection
When the output is shorted to ground, the frequency of the
oscillator will be reduced to about 110kHz. This lower
frequency allows the inductor current to safely discharge,
thereby preventing current runaway. The oscillator’s fre-
quency will gradually increase to its designed rate when
the feedback voltage again approaches 0.8V.
Overvoltage Protection
As a further protection, the overvoltage comparator in the
buck will turn the external MOSFET off when the feedback
voltage has risen 7.5% above the reference voltage of
0.8V. This comparator has a typical hysteresis of 20mV.
Slope Compensation and Inductor’s Peak Current
The inductor’s peak current is determined by:
I
V
R
PK
ITH
SENSE
=
()
–.07
10
9
LTC3700
3700f
The LDO is protected by both current limit and thermal
shutdown circuits. Current limit is set such that the output
voltage will start dropping out when the load current reaches
approximately 200mA. With a short-circuited LDO output,
the device will limit the sourced current to approximately
225mA. The thermal shutdown circuit has a typical trip
point of 150°C with a typical hysteresis of 5°C. In thermal
shutdown, the LDO pass device is turned off.
Frequency compensation of the LDO is accomplished by
forcing the dominant pole at the output. For stability, a low
ESR ceramic capacitor 2.2µF is required from LDO to
GND. For improved transient response, particularly at
heavy loads, it is recommended to use the largest value of
capacitor available in the same size considered.
Both the buck and the LDO share the same internally
generated bandgap reference voltage for their feedback
reference. When both input supplies are present, the
internal reference is powered by the buck input supply
(V
IN
). For this reason, line regulation for the LDO output is
specified both with respect to V
IN
and V
IN2
if the buck is
present and with respect only to V
IN2
if the buck is
disabled. The same is true for V
IN2
supply current, which
will be higher when the buck is disabled by the current
draw of the internal reference.
when the buck is operating below 40% duty cycle. How-
ever, once the duty cycle exceeds 40%, slope com-
pensation begins and effectively reduces the peak induc-
tor current. The amount of reduction is given by the curves
in Figure 2.
Soft-Start
An internal default soft-start circuit is employed at power
up and/or when coming out of shutdown. The soft-start
circuit works by internally clamping the voltage at the I
TH
/
RUN pin to the corresponding zero-current level and
gradually raising the clamp voltage such that the minimum
time required for the programmed switch current to reach
its maximum is approximately 0.5msec. After the soft-
start circuit has timed out, it is disabled until the part is put
in shutdown again or the input supply is cycled.
LDO Regulator
The 150mA low dropout (LDO) regulator on the LTC3700
employs an internal P-channel MOSFET pass device be-
tween its input supply (V
IN2
) and the LDO output pin. The
pass FET has an on-resistance of approximately 1.5
(with V
IN2
= 4.2V) with a strong dependence on input
supply voltage. The dropout voltage is simply the FET on-
resistance multiplied by the load current when in dropout.
OPERATIO
U
(Refer to Functional Diagram)
DUTY CYCLE (%)
0
10 20 30 40 50 60 70 80 90 100
SF = I
OUT
/I
OUT(MAX)
(%)
3700 F02
110
100
90
80
70
60
50
40
30
20
10
I
RIPPLE
= 0.4I
PK
AT 5% DUTY CYCLE
I
RIPPLE
= 0.2I
PK
AT 5% DUTY CYCLE
V
IN
= 4.2V
Figure 2. Maximum Output Current vs Duty Cycle

LTC3700EMS#PBF

Mfr. #:
Manufacturer:
Analog Devices / Linear Technology
Description:
Switching Voltage Regulators Const Freq Buck DC/DC Cntr w/ LDO Reg
Lifecycle:
New from this manufacturer.
Delivery:
DHL FedEx Ups TNT EMS
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