ATA5276M-PGQW 19 Datasheet ATA5276M-PGPW 19, ATA5276M-PGQW 19 | P4-P6

4909C–AUTO–01/07

ATA5276

4. Functional Description

4.1 Operation Modes

There are two different operation modes for the ATA5276:

• Standby mode

• Transmission mode

4.2 Standby Mode and Wake-up

After power-on-reset, the ATA5276 is in standby mode. For minimum power consumption, only

the internal 5V supply and the DIO line interface are active. The IC can be activated by the exter-

nal control unit via the serial interface. The DIO line is called logic high if it is pulled up to the

VDIO voltage level. The DIO line is called logic low if it is pulled down to the VSS voltage level. A

low signal at the DIO line wakes-up the IC.

The circuit enters the standby mode if either of these three conditions are fulfilled:

1. After power-on-reset and the DIO is high (see Figure 4-1)

2. After a time out of T

OUTL

(1)

during which DIO is permanently low (see Figure 4-3 on

page 5)

3. After a time out of T

OUTH

(2)

during which DIO is permanently high and an acknowledge

time T

ACK

ERR

(1)

(see Figure 4-2)

Notes: 1. Time does not depend on the antenna resonance frequency.

2. Time depends on the antenna resonance frequency.

Figure 4-1. STBY After POR

Figure 4-2. STBY After DIO = H

STBY

DIO

POR

STBY

TOUT_H

TACK/TERR

DIO

4909C–AUTO–01/07

ATA5276

Figure 4-3. STBY After DIO = L

4.3 Transmission Mode

4.3.1 ASK Modulation

For the transmission of a wake-up signal or data to a receiver, the ATA5276 generates a

antenna resonance synchronized signal at the antenna driver output (DRV pin). A connected LC

antenna radiates a magnetic field. For the data transmission the field can be 100% amplitude

modulated by the DIO interface input. If a low level signal is applied at the DIO pin, the driver

generates a square wave signal DRV for the antenna. If a high level signal is applied at the DIO

pin the driver is stopped and switched to ground. In this way ASK modulated data can be trans-

mitted (see Figure 4-4).

Figure 4-4. Data Transmission

4.3.2 Anti-bouncing Filter in Transmission Mode

The DIO input signal is delayed for a anti-bouncing time.

The driver is switched on after a delay time of T

(typically 64 µs) if the DIO is pulled to a low

level continuously. The driver is switched-off after a delay time of T

if the DIO is pulled to high

level.

The T

time depends on the antenna resonance frequency, suppressing short disturbance

pulses from the DIO line.

Figure 4-5. Anti-bouncing

STBY

TOUT_L

DIO

DRV

COIL

TD_L

TD_H

4909C–AUTO–01/07

ATA5276

4.3.3 Time Out and Time Out Reset

The IC has a time out supervisor for the interface line to avoid unintended continuous transmis-

sion in case of line errors. The time out timer runs if the DIO pin is pulled to a low level. If the DIO

pin is permanently low for more than the time T

OUTL

the driver is switched off and the IC enters

the standby mode. This avoids the discharging of the supply battery if the DIO line has a failure

like a body contact or another permanent low level failure. The time T

OUTL

depends on the

antenna resonance frequency.

Figure 4-6. Time Out and Time Out Reset Protocol

For continuous transmission periods the internal time out timer must be reset within the time out

reset period T

ORP

with a short high pulse of length T

at DIO. Any transmission time periods

can be made by cyclical resetting of the time out timer (see Figure 4-6). The time T

ORP

and T

depends on the antenna resonance frequency.

4.3.4 Transmission Acknowledge and Error Signal

If no failure is detected during a transmission sequence the IC acknowledges the transmission

by pulling the DIO line to low level for time T

ACK

(typically 256 µs). The acknowledge signal is

generated at the end of a transmission sequence if the DIO line was high for the time T

OUTH

(typ-

ically 16 ms).

Their are two types of error detection (see section “Diagnosis and Protection” on page 8):

• Immediate switch-off of the driver stage

• The failure is indicated through the DIO line based on transmission acknowledge and Error

signal

At the end of transmission the IC indicates the failure by an error signal by pulling the DIO line to

a low level for time T

ERR

(typically 128 µs) instead of T

ACK

With the acknowledge and the error signal a connected microcontroller is able to recognize fail-

ures of the IC or the antenna module as well as DIO line failures like a broken wire or a short

circuit.

DIO

DRV

Standby

Transmission

Delay

Time Out

TD_L

TOUT_L

Standby

TOR

Timeout

Reset

TORP

Time Out

Reset Periode

TD_H

Transmission

Delay

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ATA5276M-PGQW 19

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ATA5276M-PGQW 19

ATA5276M-PGQW 19

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