TL431, A, B Series, NCV431A, B
http://onsemi.com
10
Figure 30. High Efficiency StepDown Switching Converter
150 mH @ 2.0 A
1N5823
0.01mF
+
470 mF
51 k
0.1 mF
+
2200 mF
4.7 k
V
in
= 10 V to 20 V
TIP115
MPSA20
1.0 k
4.7 k
4.7 k
102.2 k
100 k
V
out
= 5.0 V
I
out
= 1.0 A
Test Conditions Results
Line Regulation V
in
= 10 V to 20 V, I
o
= 1.0 A 53 mV (1.1%)
Load Regulation V
in
= 15 V, I
o
= 0 A to 1.0 A 25 mV (0.5%)
Output Ripple V
in
= 10 V, I
o
= 1.0 A 50 mVpp P.A.R.D.
Output Ripple V
in
= 20 V, I
o
= 1.0 A 100 mVpp P.A.R.D.
Efficiency V
in
= 15 V, I
o
= 1.0 A 82%
TL431, A, B Series, NCV431A, B
http://onsemi.com
11
APPLICATIONS INFORMATION
The TL431 is a programmable precision reference which
is used in a variety of ways. It serves as a reference voltage
in circuits where a nonstandard reference voltage is
needed. Other uses include feedback control for driving an
optocoupler in power supplies, voltage monitor, constant
current source, constant current sink and series pass
regulator. In each of these applications, it is critical to
maintain stability of the device at various operating currents
and load capacitances. In some cases the circuit designer can
estimate the stabilization capacitance from the stability
boundary conditions curve provided in Figure 15. However,
these typical curves only provide stability information at
specific cathode voltages and at a specific load condition.
Additional information is needed to determine the
capacitance needed to optimize phase margin or allow for
process variation.
A simplified model of the TL431 is shown in Figure 31.
When tested for stability boundaries, the load resistance is
150 W. The model reference input consists of an input
transistor and a dc emitter resistance connected to the device
anode. A dependent current source, Gm, develops a current
whose amplitude is determined by the difference between
the 1.78 V internal reference voltage source and the input
transistor emitter voltage. A portion of Gm flows through
compensation capacitance, C
P2
. The voltage across C
P2
drives the output dependent current source, Go, which is
connected across the device cathode and anode.
Model component values are:
V
ref
= 1.78 V
Gm = 0.3 + 2.7 exp (I
C
/26 mA)
where I
C
is the device cathode current and Gm is in mhos
Go = 1.25 (V
cp
2) mmhos.
Resistor and capacitor typical values are shown on the
model. Process tolerances are ±20% for resistors, ±10% for
capacitors, and ±40% for transconductances.
An examination of the device model reveals the location
of circuit poles and zeroes:
P1 +
1
2p R
GM
C
P1
+
1
2p * 1.0 M * 20 pF
+ 7.96 kHz
P2 +
1
2p R
P2
C
P2
+
1
2p * 10 M * 0.265 pF
+ 60 kHz
Z1 +
1
2p R
Z1
C
P1
+
1
2p *15.9k*20pF
+ 500 kHz
In addition, there is an external circuit pole defined by the
load:
P
L
+
1
2p R
L
C
L
Also, the transfer dc voltage gain of the TL431 is:
G + G
M
R
GM
GoR
L
Example 1:
I
C
+10 mA, R
L
+ 230 W,C
L
+ 0. Define the transfer gain.
The DC gain is:
G + G
M
R
GM
GoR
L
+
(2.138)(1.0 M)(1.25 m)(230) + 615 + 56 dB
Loop gain + G
8.25 k
8.25 k ) 15 k
+ 218 + 47 dB
The resulting transfer function Bode plot is shown in
Figure 32. The asymptotic plot may be expressed as the
following equation:
Av + 615
ǒ
1 )
jf
500 kHz
Ǔ
ǒ
1 )
jf
8.0 kHz
Ǔǒ
1 )
jf
60 kHz
Ǔ
The Bode plot shows a unity gain crossover frequency of
approximately 600 kHz. The phase margin, calculated from
the equation, would be 55.9 degrees. This model matches the
OpenLoop Bode Plot of Figure 12. The total loop would
have a unity gain frequency of about 300 kHz with a phase
margin of about 44 degrees.
TL431, A, B Series, NCV431A, B
http://onsemi.com
12
Figure 31. Simplified TL431 Device Model
+
R
L
V
CC
-
C
L
15 k
9.0 mF
Input
8.25 k
3
Cathode
500 k
V
ref
1.78
V
R
ref
16
G
M
Anode 2
R
GM
1.0 M
Ref
1
Go
1.0 mmho
C
P2
0.265 pF
R
P2
10 M
R
Z1
15.9 k
C
P1
20 pF
f, FREQUENCY (Hz)
10
2
10
1
-20
30
20
60
0
Av, OPEN-LOOP VOLTAGE GAIN (dB)
Figure 32. Example 1 Circuit Open Loop Gain Plot
TL431 OPEN-LOOP VOLTAGE GAIN VERSUS FREQUENCY
40
10
4
10
3
10
7
10
5
10
6
10
-10
50
Example 2.
I
C
= 7.5 mA, R
L
= 2.2 kW, C
L
= 0.01 mF. Cathode tied to
reference input pin. An examination of the data sheet
stability boundary curve (Figure 15) shows that this value of
load capacitance and cathode current is on the boundary.
Define the transfer gain.
The DC gain is:
G + G
M
R
GM
GoR
L
+
(2.323)(1.0 M)(1.25 m)(2200) + 6389 + 76 dB
The resulting open loop Bode plot is shown in Figure 33.
The asymptotic plot may be expressed as the following
equation:
Av + 615
ǒ
1 )
jf
500 kHz
Ǔ
ǒ
1 )
jf
8.0 kHz
Ǔǒ
1 )
jf
60 kHz
Ǔǒ
1 )
jf
7.2 kHz
Ǔ
Note that the transfer function now has an extra pole
formed by the load capacitance and load resistance.
Note that the crossover frequency in this case is about
250 kHz, having a phase margin of about 46 degrees.
Therefore, instability of this circuit is likely.
f, FREQUENCY (Hz)
10
2
10
1
-20
40
20
80
0
Av, OPEN-LOOP GAIN (dB)
Figure 33. Example 2 Circuit Open Loop Gain Plot
TL431 OPEN-LOOP BODE PLOT WITH LOAD CAP
60
10
4
10
3
10
6
10
5
With three poles, this system is unstable. The only hope
for stabilizing this circuit is to add a zero. However, that can
only be done by adding a series resistance to the output
capacitance, which will reduce its effectiveness as a noise
filter. Therefore, practically, in reference voltage
applications, the best solution appears to be to use a smaller
value of capacitance in low noise applications or a very
large value to provide noise filtering and a dominant pole
rolloff of the system.

TL431BCDMR2

Mfr. #:
Manufacturer:
ON Semiconductor
Description:
IC VREF SHUNT ADJ MICRO8
Lifecycle:
New from this manufacturer.
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