MC68HC908JB12DW

Freescale Semiconductor
Application Note
Document Number: HC908JB16AD/D
Rev. 1, 03/2010
© Freescale Semiconductor, Inc., 2010. All rights reserved.
This addendum provides update and additional information to the
MC68HC908JB16 Technical Data, Rev. 1.1
(Freescale document number MC68HC908JB16/D).
pertaining to the following:
MC68HC908JB16
Update to V
REG
LVI trip point
20-pin SOIC package
MC68HC908JB12
MC68HC908JB16
This section updates data sheet information and introduces the 20-pin SOIC
package for the MC68HC908JB16. These updates apply to the 20-pin SOIC
only.
V
REG
LVI Trip Point Page 318, entry for minimum V
REG
LVI trip point voltage has been updated.
From:
To:
Characteristic Symbol Min
Typ
Max Unit
V
REG
LVI trip point voltage V
LVR
2.0 2.2 2.6 V
V
REG
LVI trip point voltage V
LVR
1.9 2.2 2.6 V
Addendum to MC68HC908JB16
Technical Data
Addendum to MC68HC908JB16 Technical Data, Rev. 1
MC68HC908JB16
Freescale Semiconductor2
Output Low Voltage Page 318, entry for maximum V
OL
has been updated.
From:
To:
20-Pin SOIC Order Number: MC68HC908JB16JDW
Figure 1. 20-Pin SOIC Pin Assignment
Characteristic Symbol Min
Typ
Max Unit
Output low voltage
(I
Load
= 25 mA) PTD0–PTD1 in ILDD mode
V
OL
——0.5V
Output low voltage
(I
Load
= 45 mA) PTD0/1 in ILDD mode
V
OL
——0.5V
1
2
3
4
5
6
7
20
19
18
17
16
15
14
13
12
11
8
9
10
OSC1
PTA0/KBA0
RST
PTA1/KBA1
PTA2/KBA2
PTA3/KBA3
PTA4/KBA4
PTA5/KBA5
PTA6/KBA6
PTA7/KBA7
IRQ
OSC2
VREG
VDD
PTD0/1
PTE1/T1CH01
PTE3/D+
PTE4/D–
PTC0/TxD
VSS
Internal pads are unconnected.
PTD0/1 pin: PTD0 and PTD1 internal pads are bonded together to PTD0/1 pin.
PTD0/1 has a 45 mA sink capability when configured as an output.
Pin direction must be configured such that DDRD0 = DDRD1.
Pins not available on 20-pin package:
PTC1/RxD PTE0/TCLK PTD2
PTE2/T2CH01 PTD3
CGMXFC1 CGMXFC2 PTD4
CGMOUT1 CGMOUT2 PTD5
VREGA0 VREGA1
VSSA0 VSSA1 VDDA
MC68HC908JB16
Addendum to MC68HC908JB16 Technical Data, Rev. 1
Freescale Semiconductor 3
Figure 2. 20-Pin SOIC Mechanical Dimensions (Case No. 751D)
NOTES:
1. DIMENSIONING AND TOLERANCING PER
ANSI Y14.5M, 1982.
2. CONTROLLING DIMENSION: MILLIMETER.
3. DIMENSIONS A AND B DO NOT INCLUDE
MOLD PROTRUSION.
4. MAXIMUM MOLD PROTRUSION 0.150
(0.006) PER SIDE.
5. DIMENSION D DOES NOT INCLUDE
DAMBAR PROTRUSION. ALLOWABLE
DAMBAR PROTRUSION SHALL BE 0.13
(0.005) TOTAL IN EXCESS OF D DIMENSION
AT MAXIMUM MATERIAL CONDITION.
–A–
–B–
20
1
11
10
S
A
M
0.010 (0.25) B
S
T
D
20X
M
B
M
0.010 (0.25)
P10X
J
F
G
18X
K
C
–T–
SEATING
PLANE
M
R
X 45
DIM MIN MAX MIN MAX
INCHESMILLIMETERS
A 12.65 12.95 0.499 0.510
B 7.40 7.60 0.292 0.299
C 2.35 2.65 0.093 0.104
D 0.35 0.49 0.014 0.019
F 0.50 0.90 0.020 0.035
G 1.27 BSC 0.050 BSC
J 0.25 0.32 0.010 0.012
K 0.10 0.25 0.004 0.009
M 0 7 0 7
P 10.05 10.55 0.395 0.415
R 0.25 0.75 0.010 0.029

MC68HC908JB12DW

Mfr. #:
Manufacturer:
NXP Semiconductors
Description:
IC MCU 8BIT 12KB FLASH 28SOIC
Lifecycle:
New from this manufacturer.
Delivery:
DHL FedEx Ups TNT EMS
Payment:
T/T Paypal Visa MoneyGram Western Union

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