LTC3805IDD-5#PBF Datasheet LTC3805EMSE-5#TRPBF, LTC3805IMSE-5#TRPBF, LTC3805MPMSE-5#TRPBF | P13-P15

LTC3805-5

38055fe

APPLICATIONS INFORMATION

Feedback in Isolated Applications

Isolated applications do not use the FB pin and error ampli-

ﬁer but control the I

pin directly using an opto-isolator

driven on the other side of the isolation barrier as shown

in Figure 4. For isolated converters, the FB pin is grounded

which provides pull-up on the I

pin. This pull-up is not

enough to properly bias the opto-isolator which is typically

biased using a resistor to V

. Since the I

pin cannot

sink the opto-isolator bias current, a diode is required to

block it from the I

pin. A low leakage Schottky diode,

or low forward voltage PN junction diode, should be used

to ensure that the opto-isolator is able to pull I

down

to its lower clamp.

Oscillator Synchronization

The oscillator may be synchronized to an external clock

by connecting the synchronization signal to the SYNC pin.

The LTC3805-5 oscillator and turn-on of the switch are

synchronized to the rising edge of the external clock. The

frequency of the external sync signal must be ±33% with

respect to f

OSC

(as programmed by R

). Additionally, the

value of f

SYNC

must be between 70kHz and 700kHz.

Current Sense Resistor Considerations

The external current sense resistor (R

SENSE

in Figure 8)

allows the user to optimize the current limit behavior for

the particular application. As the current sense resistor

is varied from several ohms down to tens of milliohms,

peak switch current goes from a fraction of an ampere to

several amperes. Care must be taken to ensure proper

circuit operation, especially with small current sense

resistor values.

For example, with the peak current sense voltage of 100mV

on the I

SENSE

pin, a peak switch current of 5A requires

a sense resistor of 0.020W. Note that the instantaneous

peak power in the sense resistor is 0.5W and it must be

rated accordingly. The LTC3805-5 has only a single sense

line to this resistor. Therefore, any parasitic resistance

in the ground side connection of the sense resistor will

increase its apparent value. In the case of a 0.020W sense

resistor, one milliohm of parasitic resistance will cause a

5% reduction in peak switch current. So the resistance of

printed circuit copper traces and vias cannot necessarily

be ignored.

Programmable Slope Compensation

The LTC3805-5 injects a ramping current through its I

SENSE

pin into an external slope compensation resistor R

SLOPE

This current ramp starts at zero right after the GATE pin

has been high for the LTC3805-5’s minimum duty cycle

of 6%. The current rises linearly towards a peak of 10µA

at the maximum duty cycle of 80%, shutting off once the

GATE pin goes low. A series resistor R

SLOPE

connecting the

SENSE

pin to the current sense resistor R

SENSE

develops a

ramping voltage drop. From the perspective of the I

SENSE

pin, this ramping voltage adds to the voltage across the

sense resistor, effectively reducing the current comparator

threshold in proportion to duty cycle. This stabilizes the

control loop against subharmonic oscillation. The amount

of reduction in the current comparator threshold (DV

SENSE

)

can be calculated using the following equation:

SENSE

DutyCycle − 6%

80%

10µA • R

SLOPE

Note: LTC3805-5 enforces 6% < Duty Cycle < 80%. A good

starting value for R

SLOPE

is 3k, which gives a 30mV drop

in current comparator threshold at 80% duty cycle.

Designs that do not operate at greater than 50% duty cycle

do not need slope compensation and may replace R

SLOPE

with a direct connection.

Figure 4. Circuit for Isolated Feedback

LTC3805-5

ISOLATION

BARRIER

GND

38055 F04

LTC3805-5

38055fe

APPLICATIONS INFORMATION

Overcurrent Threshold Adjustment

Figure 5 shows the connection of the overcurrent pin, OC,

along with the I

SENSE

pin and the current sense resistor

SENSE

located in the source circuit of the power NMOS

which is driven by the GATE pin. The internal overcurrent

threshold on the OC pin is set at V

OCT

= 100 mV which is the

same as the peak current sense voltage V

I(MAX)

= 100 mV on

the I

SENSE

pin. The role of the slope compensation adjust-

ment resistor R

SLOPE

and the slope compensation current

SLOPE

is discussed in the prior section. In combination with

the overcurrent threshold adjust current I

= 10µA, an

external resistor R

can be used to lower the overcurrent

trip threshold from 100mV. This section describes how

to pick R

to achieve the desired performance. In the

discussion that follows be careful to distinguish between

“current limit” where the converter continues to run with

the I

SENSE

pin limiting current on a cycle-by-cycle basis

while the output voltage falls below the regulation point

and “overcurrent protection” where the OC pin senses an

overcurrent and shuts down the converter for a timeout

period before attempting an automatic restart.

One overcurrent protection strategy is for the converter

to never enter current limit but to maintain output volt-

age regulation up to the point of tripping the overcurrent

protection. Operation at minimum input voltage V

IN(MIN)

hits current limiting for the smallest output current and

is the design point for this strategy.

First, for operation at V

IN(MIN)

, calculate the duty cycle Duty

Cycle V

IN(MIN)

using the appropriate formula depending on

whether the converter is a boost, ﬂyback or SEPIC. Then

use Duty Cycle V

IN(MIN)

to calculate DV

SENSE(VIN(MIN))

using the formula in the prior section. For overcurrent

protection to trip at exactly the point where current limit-

ing would begin set:

OC(CRIT)

SENSE VIN(MIN)

( )

10µA

To ﬁnd the actual output current that trips overcurrent

protection, calculate the peak switch current I

PK(VIN(MIN))

from:

PK VIN(MIN)

( )

100mV − DV

SENSE VIN(MIN)

( )

SENSE

Then calculate the converter output current that corre-

sponds to I

PK(VIN(MIN))

. Again, the calculation depends

both on converter type and the details of converter design

including inductor current ripple. For minimum input volt-

age, R

OC(CRIT)

produces an overcurrent trip at an output

current just before loss of output voltage regulation and

the onset of current limiting. Note that the output current

that causes an overcurrent trip is higher for higher input

voltages but that an overcurrent trip will always occur

before loss of output voltage regulation. If desired to

meet a speciﬁc design target, an increase in R

above

OC(CRIT)

can be used to reduce the trip threshold and

make the converter trip for a lower output current.

This calculation is based on steady-state operation. De-

pending on design, overcurrent protection can also be

triggered during a start-up transient, particularly if large

output ﬁlter capacitors are being charged as output voltage

rises. If that is a problem, output capacitor charging can

be slowed by using a larger value of SSFLT capacitor. It is

also possible to trip overcurrent protection during a load

step especially if the trip threshold is lowered by making

> R

OC(CRIT)

Another overcurrent protection strategy is keep the con-

verter running as current limiting reduces the duty cycle

and the output voltage sags. In this case, the goal is often

keep the converter in normal operation over as wide a range

as possible, including current limiting, and to trigger the

Figure 5. Circuit to Decrease Overcurrent Threshold

LTC3805-5

GATE

SENSE

SLOPE

= 10µA

SLOPE

GND

38055 F05

LTC3805-5

38055fe

APPLICATIONS INFORMATION

overcurrent trip only to prevent damage. To implement

this strategy use a value of R

smaller than R

OC(CRIT)

This also reduces sensitivity to overcurrent trips caused by

transient operation. In the limit, set R

= 0 and connect

the OC pin directly to R

SENSE

. This causes an overcurrent

trip near minimum duty cycle or around 6%.

In some cases it may be desirable to increase the trip

threshold even further. In this strategy, the converter is

allowed to operate all the way down to minimum duty

cycle at which point the cycle-by-cycle current limit of

the I

SENSE

pin is lost and switch current goes up propor-

tionally to the output current. Figures 6 and 7 show two

ways to do this. Figure 6 is for relatively low currents with

relatively large values of R

SENSE

. Using this circuit the

overcurrent trip threshold is increased from 100mV to:

SENSE1

+ R

SENSE2

SENSE1

100mV

where it is assumed that the values of R

SENSE1

and

SENSE2

are so small that the I

= 10µA threshold adjust-

ment current produces a negligible change in V

For larger currents, values of the current sense resistors

must be very small and the circuit of Figure 6 becomes

impractical. The circuit of Figure 7 can be substituted and the

current sense threshold is increased from 100mV to:

100mV

where the values of R1 and R2 should be kept below 10W

to prevent the I

= 10µA threshold adjustment current

from producing a shift in V

External Soft-Start Fault Timeout

The external soft-start is programmed by a capacitor C

from the SSFLT pin to GND. At the initiation of soft-start

the voltage on the SSFLT pin is quickly charged to 0.7V

at which point GATE begins switching. From that point,

a 6µA current charges the voltage on the SSFLT pin until

the voltage reaches about 2.25V at which point soft-start

is over and the converter enters closed-loop regulation.

The soft-start time t

SS(EXT)

as a function of the soft-start

capacitor C

is therefore:

SS(EXT)

= C

2.25 − 0.7V

6µA

After soft-start is complete, the voltage on the SSFLT pin

continues to charge to about a ﬁnal value of 4.75V. Note

that choosing a value of C

less than 5.8nF has no effect

since it would attempt to program an external soft-start

time t

SS(EXT)

less than the mandatory minimum internal

soft-start time t

SS(IN)

= 1.8ms.

If there is an overcurrent fault detected on the OC pin, the

LTC3805-5 enters a shutdown mode while a 2µA current

discharges the voltage on the SSFLT pin from 4.75V to

about 0.7V. The fault timeout t

FTO(EXT)

is therefore:

FTO(EXT)

= C

4.75V − 0.7V

2µA

At this point, the LTC3805-5 attempts a restart.

In the event of a persistent fault, such as a short-circuit

on the converter output, the converter enters a “hiccup”

mode where it continues to try and restart at repetition

rate determined by C

. If the fault is eventually removed

the converter successfully restarts.

Figure 6. Circuit to Increase the Overcurrent

Threshold for Small Switch Currents

Figure 7. Circuit to Increase the Overcurrent

Threshold for Large Switch Currents

LTC3805-5

GATE

SENSE

SENSE1

SENSE2

SLOPE

GND

38055 F06

= 10µA

SLOPE

LTC3805-5

GATE

SENSE

SLOPE

GND

38055 F07

SENSE

= 10µA

SLOPE

P1-P3 P4-P6 P7-P9 P10-P12 P13-P15 P16-P18 P19-P20

LTC3805IDD-5#PBF

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